display/amdgpu_dm/amdgpu_dm_hdcp.c

100 			 struct amdgpu_dm_connector *aconnector,
110 	hdcp_w->aconnector = aconnector;
113 	mod_hdcp_query_display(&hdcp_w->hdcp, aconnector->base.index, &query);
117 		mod_hdcp_remove_display(&hdcp_w->hdcp, aconnector->base.index, &hdcp_w->output);
147 			 struct amdgpu_dm_connector *aconnector)
152 	hdcp_w->aconnector = aconnector;
154 	mod_hdcp_remove_display(&hdcp_w->hdcp, aconnector->base.index, &hdcp_w->output);
209 	struct amdgpu_dm_connector *aconnector = hdcp_work->aconnector;
210 	struct drm_device *dev = hdcp_work->aconnector->base.dev;
217 	if (aconnector->base.state->commit) {
218 		ret = wait_for_completion_interruptible_timeout(&aconnector->base.state->commit->hw_done, 10 * HZ);
227 		if (aconnector->base.state->hdcp_content_type == DRM_MODE_HDCP_CONTENT_TYPE0 &&
229 			drm_hdcp_update_content_protection(&aconnector->base, DRM_MODE_CONTENT_PROTECTION_ENABLED);
230 		else if (aconnector->base.state->hdcp_content_type == DRM_MODE_HDCP_CONTENT_TYPE1 &&
232 			drm_hdcp_update_content_protection(&aconnector->base, DRM_MODE_CONTENT_PROTECTION_ENABLED);
234 		drm_hdcp_update_content_protection(&aconnector->base, DRM_MODE_CONTENT_PROTECTION_DESIRED);
247 	struct amdgpu_dm_connector *aconnector = hdcp_work->aconnector;
249 	if (!aconnector)
255 	mod_hdcp_query_display(&hdcp_work->hdcp, aconnector->base.index, &query);
319 	struct amdgpu_dm_connector *aconnector = config->dm_stream_ctx;
320 	int link_index = aconnector->dc_link->link_index;
327 	display->index = aconnector->base.index;
330 		hdcp_remove_display(hdcp_work, link_index, aconnector);
335 	if (aconnector->dc_sink != NULL)
336 		link->mode = mod_hdcp_signal_type_to_operation_mode(aconnector->dc_sink->sink_signal);
341 	link->ddc_line = aconnector->dc_link->ddc_hw_inst + 1;
342 	link->dp.rev = aconnector->dc_link->dpcd_caps.dpcd_rev.raw;
346 	hdcp_update_display(hdcp_work, link_index, aconnector, DRM_MODE_HDCP_CONTENT_TYPE0, false);