amd/amdgpu/amdgpu_gfx_v10_0.c

1031 	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
1032 	amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL);
1061 	bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
1069 				      &adev->gfx.mec.hpd_eop_obj,
1070 				      &adev->gfx.mec.hpd_eop_gpu_addr,
1078 	memset(hpd, 0, adev->gfx.mec.hpd_eop_obj->tbo.mem.size);
1080 	amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj);
1081 	amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);
1092 					      &adev->gfx.mec.mec_fw_obj,
1093 					      &adev->gfx.mec.mec_fw_gpu_addr,
1096 			dev_err(adev->dev, "(%d) failed to create mec fw bo\n", r);
1103 		amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj);
1104 		amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj);
1270 				       int mec, int pipe, int queue)
1279 	ring->me = mec + 1;
1286 	ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr
1291 		+ ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec)
1316 		adev->gfx.mec.num_mec = 2;
1317 		adev->gfx.mec.num_pipe_per_mec = 4;
1318 		adev->gfx.mec.num_queue_per_pipe = 8;
1324 		adev->gfx.mec.num_mec = 1;
1325 		adev->gfx.mec.num_pipe_per_mec = 4;
1326 		adev->gfx.mec.num_queue_per_pipe = 8;
1394 	for (i = 0; i < adev->gfx.mec.num_mec; ++i) {
1395 		for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) {
1396 			for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) {
2942 	WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, adev->gfx.mec.mec_fw_gpu_addr &
2945 		     upper_32_bits(adev->gfx.mec.mec_fw_gpu_addr));
3472 		if (adev->gfx.mec.mqd_backup[mqd_idx])
3473 			memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd));
3493 		if (adev->gfx.mec.mqd_backup[mqd_idx])
3494 			memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd));
3514 		if (adev->gfx.mec.mqd_backup[mqd_idx])
3515 			memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd));
3518 		if (adev->gfx.mec.mqd_backup[mqd_idx])
3519 			memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd));