Lines Matching defs:mec

43 int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec,
48 bit += mec * adev->gfx.mec.num_pipe_per_mec
49 * adev->gfx.mec.num_queue_per_pipe;
50 bit += pipe * adev->gfx.mec.num_queue_per_pipe;
57 int *mec, int *pipe, int *queue)
59 *queue = bit % adev->gfx.mec.num_queue_per_pipe;
60 *pipe = (bit / adev->gfx.mec.num_queue_per_pipe)
61 % adev->gfx.mec.num_pipe_per_mec;
62 *mec = (bit / adev->gfx.mec.num_queue_per_pipe)
63 / adev->gfx.mec.num_pipe_per_mec;
68 int mec, int pipe, int queue)
70 return test_bit(amdgpu_gfx_mec_queue_to_bit(adev, mec, pipe, queue),
71 adev->gfx.mec.queue_bitmap);
197 return adev->gfx.mec.num_mec > 1;
202 int i, queue, pipe, mec;
207 queue = i % adev->gfx.mec.num_queue_per_pipe;
208 pipe = (i / adev->gfx.mec.num_queue_per_pipe)
209 % adev->gfx.mec.num_pipe_per_mec;
210 mec = (i / adev->gfx.mec.num_queue_per_pipe)
211 / adev->gfx.mec.num_pipe_per_mec;
214 if (mec >= adev->gfx.mec.num_mec)
219 if (mec == 0 && queue < 2)
220 set_bit(i, adev->gfx.mec.queue_bitmap);
223 if (mec == 0 && pipe == 0)
224 set_bit(i, adev->gfx.mec.queue_bitmap);
230 bitmap_weight(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
264 int mec, pipe, queue;
266 queue_bit = adev->gfx.mec.num_mec
267 * adev->gfx.mec.num_pipe_per_mec
268 * adev->gfx.mec.num_queue_per_pipe;
271 if (test_bit(queue_bit, adev->gfx.mec.queue_bitmap))
274 amdgpu_gfx_bit_to_mec_queue(adev, queue_bit, &mec, &pipe, &queue);
281 if ((mec == 1 && pipe > 1) || queue != 0)
284 ring->me = mec + 1;
391 adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS] = kmalloc(mqd_size, GFP_KERNEL);
392 if (!adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS])
430 adev->gfx.mec.mqd_backup[i] = kmalloc(mqd_size, GFP_KERNEL);
431 if (!adev->gfx.mec.mqd_backup[i])
456 kfree(adev->gfx.mec.mqd_backup[i]);
463 kfree(adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS]);
500 if (!test_bit(i, adev->gfx.mec.queue_bitmap))
514 DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe,