dev/usb/xhci.c

526 	xx->xx_trb[idx].trb_3 = control;
535 	trb->trb_3 = htole32(control);
1884 	trb.trb_3 = XHCI_TRB_3_SLOT_SET(xs->xs_idx) |
1927 	trb.trb_3 = XHCI_TRB_3_SLOT_SET(xs->xs_idx) |
1956 	trb.trb_3 = XHCI_TRB_3_SLOT_SET(xs->xs_idx) |
2009 	trb.trb_3 = XHCI_TRB_3_SLOT_SET(xs->xs_idx) |
2175 	trb.trb_3 = XHCI_TRB_3_SLOT_SET(xs->xs_idx) |
2385 	uint32_t trb_2, trb_3;
2398 	trb_3 = le32toh(trb->trb_3);
2400 	slot = XHCI_TRB_3_SLOT_GET(trb_3);
2401 	dci = XHCI_TRB_3_EP_GET(trb_3);
2411 	if ((trb_3 & XHCI_TRB_3_ED_BIT) == 0) {
2429 			    XHCI_TRB_3_TYPE_GET(le32toh(xr->xr_trb[idx].trb_3)),
2464 	if ((trb_3 & XHCI_TRB_3_ED_BIT) != 0) {
2499 		} else if ((trb_3 & XHCI_TRB_3_ED_BIT) == 0) {
2503 			if (XHCI_TRB_3_TYPE_GET(le32toh(xr->xr_trb[idx].trb_3))
2545 	if ((trb_3 & XHCI_TRB_3_ED_BIT) == 0 ||
2566 	uint32_t trb_2, trb_3;
2574 	trb_3 = le32toh(trb->trb_3);
2581 		sc->sc_result_trb.trb_3 = trb_3;
2586 			    trb_0, trb_2, trb_3, 0);
2591 		    "0x%08jx 0x%08jx", (uintptr_t)trb, trb_0, trb_2, trb_3);
2604 	uint32_t trb_2, trb_3;
2610 	trb_3 = le32toh(trb->trb_3);
2613 	    (uintptr_t)trb, trb_0, trb_2, trb_3);
2631 	switch (XHCI_TRB_3_TYPE_GET(trb_3)) {
2682 		k = (le32toh(trb->trb_3) & XHCI_TRB_3_CYCLE_BIT) ? 1 : 0;
3088 		    trbs[i].trb_0, trbs[i].trb_2, trbs[i].trb_3, 0);
3089 		KASSERTMSG(XHCI_TRB_3_TYPE_GET(trbs[i].trb_3) !=
3090 		    XHCI_TRB_TYPE_LINK, "trbs[%zu].trb3 %#x", i, trbs[i].trb_3);
3131 			control = trbs[i].trb_3;
3161 		xr->xr_trb[firstep].trb_3 |= htole32(XHCI_TRB_3_CYCLE_BIT);
3163 		xr->xr_trb[firstep].trb_3 &= ~htole32(XHCI_TRB_3_CYCLE_BIT);
3239 	    trb->trb_0, trb->trb_2, trb->trb_3, 0);
3278 	trb->trb_3 = sc->sc_result_trb.trb_3;
3281 	    trb->trb_0, trb->trb_2, trb->trb_3, 0);
3328 	trb.trb_3 = XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_ENABLE_SLOT);
3335 	*slotp = XHCI_TRB_3_SLOT_GET(trb.trb_3);
3360 	trb.trb_3 = XHCI_TRB_3_SLOT_SET(slot) |
3402 	trb.trb_3 = XHCI_TRB_3_SLOT_SET(slot_id) |
3439 	trb.trb_3 = XHCI_TRB_3_SLOT_SET(xs->xs_idx) |