dev/pci/if_nfe.c

477 		NFE_WRITE(sc, NFE_MACADDR_LO,
479 		NFE_WRITE(sc, NFE_MACADDR_HI,
529 	NFE_WRITE(sc, NFE_RNDSEED, seed);	/* XXX: gigabit NICs only? */
531 	NFE_WRITE(sc, NFE_PHY_IFACE, phy);
532 	NFE_WRITE(sc, NFE_MISC1, misc);
533 	NFE_WRITE(sc, NFE_LINKSPEED, link);
543 	NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
546 		NFE_WRITE(sc, NFE_PHY_CTL, NFE_PHY_BUSY);
550 	NFE_WRITE(sc, NFE_PHY_CTL, (phy << NFE_PHYADD_SHIFT) | reg);
586 	NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
589 		NFE_WRITE(sc, NFE_PHY_CTL, NFE_PHY_BUSY);
593 	NFE_WRITE(sc, NFE_PHY_DATA, val);
595 	NFE_WRITE(sc, NFE_PHY_CTL, ctl);
636 		NFE_WRITE(sc, NFE_IRQ_STATUS, r);
650 			NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
1236 		NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_KICKTX | sc->rxtxctl);
1270 	NFE_WRITE(sc, NFE_TX_UNK, 0);
1271 	NFE_WRITE(sc, NFE_STATUS, 0);
1289 	NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_RESET | sc->rxtxctl);
1291 	NFE_WRITE(sc, NFE_RXTX_CTL, sc->rxtxctl);
1295 		NFE_WRITE(sc, NFE_VTAG_CTL, NFE_VTAG_ENABLE);
1298 	NFE_WRITE(sc, NFE_SETUP_R6, 0);
1304 	NFE_WRITE(sc, NFE_RX_RING_ADDR_HI, ((uint64_t)sc->rxq.physaddr) >> 32);
1305 	NFE_WRITE(sc, NFE_RX_RING_ADDR_LO, sc->rxq.physaddr & 0xffffffff);
1306 	NFE_WRITE(sc, NFE_TX_RING_ADDR_HI, ((uint64_t)sc->txq.physaddr) >> 32);
1307 	NFE_WRITE(sc, NFE_TX_RING_ADDR_LO, sc->txq.physaddr & 0xffffffff);
1309 	NFE_WRITE(sc, NFE_RING_SIZE,
1313 	NFE_WRITE(sc, NFE_RXBUFSZ, sc->rxq.bufsz);
1317 	NFE_WRITE(sc, NFE_PWR_STATE, tmp | NFE_PWR_WAKEUP);
1320 	NFE_WRITE(sc, NFE_PWR_STATE, tmp | NFE_PWR_VALID);
1323 	NFE_WRITE(sc, NFE_IRQ_MASK, 0);
1325 	NFE_WRITE(sc, NFE_IRQ_MASK, NFE_IRQ_WANTED);
1330 	NFE_WRITE(sc, NFE_IMTIMER, NFE_IM_DEFAULT);
1333 	NFE_WRITE(sc, NFE_IMTIMER, 970);
1336 	NFE_WRITE(sc, NFE_SETUP_R1, NFE_R1_MAGIC);
1337 	NFE_WRITE(sc, NFE_SETUP_R2, NFE_R2_MAGIC);
1338 	NFE_WRITE(sc, NFE_SETUP_R6, NFE_R6_MAGIC);
1341 	NFE_WRITE(sc, NFE_STATUS, sc->mii_phyaddr << 24 | NFE_STATUS_MAGIC);
1343 	NFE_WRITE(sc, NFE_SETUP_R4, NFE_R4_MAGIC);
1344 	NFE_WRITE(sc, NFE_WOL_CTL, NFE_WOL_ENABLE);
1347 	NFE_WRITE(sc, NFE_RXTX_CTL, sc->rxtxctl);
1349 	NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_BIT1 | sc->rxtxctl);
1360 	NFE_WRITE(sc, NFE_RX_CTL, NFE_RX_START);
1363 	NFE_WRITE(sc, NFE_TX_CTL, NFE_TX_START);
1365 	NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
1368 	NFE_WRITE(sc, NFE_IRQ_MASK, NFE_IRQ_WANTED);
1392 	NFE_WRITE(sc, NFE_TX_CTL, 0);
1395 	NFE_WRITE(sc, NFE_RX_CTL, 0);
1398 	NFE_WRITE(sc, NFE_IRQ_MASK, 0);
1930 	NFE_WRITE(sc, NFE_MULTIADDR_HI,
1932 	NFE_WRITE(sc, NFE_MULTIADDR_LO,
1934 	NFE_WRITE(sc, NFE_MULTIMASK_HI,
1936 	NFE_WRITE(sc, NFE_MULTIMASK_LO,
1940 	NFE_WRITE(sc, NFE_RXFILTER, filter);
1975 	NFE_WRITE(sc, NFE_MACADDR_LO,
1977 	NFE_WRITE(sc, NFE_MACADDR_HI,
2000 		NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_RESET | NFE_RXTX_BIT2);
2001 		NFE_WRITE(sc, NFE_MAC_RESET, NFE_MAC_RESET_MAGIC);
2003 		NFE_WRITE(sc, NFE_MAC_RESET, 0);
2005 		NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_BIT2);
2006 		NFE_WRITE(sc, NFE_PWR2_CTL,