dev/pci/if_dge.c

2326 	reg = CSR_READ(sc, DGE_EECD) & ~(EECD_SK | EECD_DI | EECD_CS);
2329 	CSR_WRITE(sc, DGE_EECD, reg);
2331 	CSR_WRITE(sc, DGE_EECD, reg | EECD_CS);
2349 	CSR_WRITE(sc, DGE_EECD, reg);
2362 	reg = CSR_READ(sc, DGE_EECD) & ~(EECD_DI | EECD_SK);
2366 	CSR_WRITE(sc, DGE_EECD, reg);
2368 	CSR_WRITE(sc, DGE_EECD, reg | EECD_SK);
2370 	CSR_WRITE(sc, DGE_EECD, reg);
2382 	reg = CSR_READ(sc, DGE_EECD) & ~(EECD_DI | EECD_DO | EECD_SK);
2384 	CSR_WRITE(sc, DGE_EECD, reg | EECD_SK); /* Raise clock */
2386 	rv = (CSR_READ(sc, DGE_EECD) & EECD_DO) != 0; /* Get bit */
2387 	CSR_WRITE(sc, DGE_EECD, reg); /* Lower clock */