Lines Matching defs:ess
266 esm_dump_regs(struct esm_softc *ess)
270 printf("%s registers:", device_xname(ess->sc_dev));
277 printf("%8.8x, ", bus_space_read_4(ess->st, ess->sh,
281 printf("%4.4x, ", bus_space_read_2(ess->st, ess->sh,
286 bus_space_read_1(ess->st, ess->sh,
306 struct esm_softc *ess;
309 ess = sc;
312 if ((bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT)
319 device_xname(ess->sc_dev));
321 bus_space_write_1(ess->st, ess->sh, PORT_CODEC_CMD,
327 if ((bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT)
335 device_xname(ess->sc_dev));
337 *result = bus_space_read_2(ess->st, ess->sh, PORT_CODEC_REG);
345 struct esm_softc *ess;
348 ess = sc;
351 if ((bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT)
359 device_xname(ess->sc_dev));
363 bus_space_write_2(ess->st, ess->sh, PORT_CODEC_REG, data);
364 bus_space_write_1(ess->st, ess->sh, PORT_CODEC_CMD,
373 ringbus_setdest(struct esm_softc *ess, int src, int dest)
377 data = bus_space_read_4(ess->st, ess->sh, PORT_RINGBUS_CTRL);
380 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, data);
386 wp_rdreg(struct esm_softc *ess, uint16_t reg)
389 bus_space_write_2(ess->st, ess->sh, PORT_DSP_INDEX, reg);
390 return bus_space_read_2(ess->st, ess->sh, PORT_DSP_DATA);
394 wp_wrreg(struct esm_softc *ess, uint16_t reg, uint16_t data)
397 bus_space_write_2(ess->st, ess->sh, PORT_DSP_INDEX, reg);
398 bus_space_write_2(ess->st, ess->sh, PORT_DSP_DATA, data);
402 apu_setindex(struct esm_softc *ess, uint16_t reg)
406 wp_wrreg(ess, WPREG_CRAM_PTR, reg);
409 if (bus_space_read_2(ess->st, ess->sh, PORT_DSP_DATA) == reg)
411 bus_space_write_2(ess->st, ess->sh, PORT_DSP_DATA, reg);
414 printf("%s: apu_setindex() timed out.\n", device_xname(ess->sc_dev));
418 wp_rdapu(struct esm_softc *ess, int ch, uint16_t reg)
422 apu_setindex(ess, ((unsigned)ch << 4) + reg);
423 ret = wp_rdreg(ess, WPREG_DATA_PORT);
428 wp_wrapu(struct esm_softc *ess, int ch, uint16_t reg, uint16_t data)
434 ess, ch, reg, data));
436 apu_setindex(ess, ((unsigned)ch << 4) + reg);
437 wp_wrreg(ess, WPREG_DATA_PORT, data);
439 if (bus_space_read_2(ess->st, ess->sh, PORT_DSP_DATA) == data)
441 bus_space_write_2(ess->st, ess->sh, PORT_DSP_DATA, data);
444 printf("%s: wp_wrapu() timed out.\n", device_xname(ess->sc_dev));
448 wp_settimer(struct esm_softc *ess, u_int freq)
467 ess, freq, clock, prescale, divide));
469 wp_wrreg(ess, WPREG_TIMER_ENABLE, 0);
470 wp_wrreg(ess, WPREG_TIMER_FREQ,
472 wp_wrreg(ess, WPREG_TIMER_ENABLE, 1);
476 wp_starttimer(struct esm_softc *ess)
479 wp_wrreg(ess, WPREG_TIMER_START, 1);
483 wp_stoptimer(struct esm_softc *ess)
486 wp_wrreg(ess, WPREG_TIMER_START, 0);
487 bus_space_write_2(ess->st, ess->sh, PORT_INT_STAT, 1);
493 wc_wrreg(struct esm_softc *ess, uint16_t reg, uint16_t data)
496 bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_INDEX, reg);
497 bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_DATA, data);
501 wc_wrchctl(struct esm_softc *ess, int ch, uint16_t data)
504 wc_wrreg(ess, ch << 3, data);
514 struct esm_softc *ess;
516 ess = sc;
517 ess->codec_if = codec_if;
533 struct esm_softc *ess;
535 ess = sc;
536 return ess->codec_flags;
541 esm_initcodec(struct esm_softc *ess)
545 DPRINTF(ESM_DEBUG_CODEC, ("esm_initcodec(%p)\n", ess));
547 if (bus_space_read_4(ess->st, ess->sh, PORT_RINGBUS_CTRL)
549 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 0);
553 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL,
556 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL,
560 esm_read_codec(ess, 0, &data);
561 if (bus_space_read_1(ess->st, ess->sh, PORT_CODEC_STAT)
563 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 0);
567 printf("%s: will perform cold reset.\n", device_xname(ess->sc_dev));
568 data = bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DIR);
569 if (pci_conf_read(ess->pc, ess->tag, 0x58) & 1)
572 ~bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DATA);
573 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_MASK, 0xff6);
574 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR,
576 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x000);
578 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x001);
580 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x009);
582 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR, data);
584 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL,
591 esm_init(struct esm_softc *ess)
595 bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL,
598 bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL, 0);
602 bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL,
608 wp_wrreg(ess, WPREG_WAVE_ROMRAM,
610 bus_space_write_2(ess->st, ess->sh, PORT_WAVCACHE_CTRL,
614 esm_initcodec(ess);
615 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL,
619 wp_wrreg(ess, 0x8, 0xB004);
620 wp_wrreg(ess, 0x9, 0x001B);
621 wp_wrreg(ess, 0xA, 0x8000);
622 wp_wrreg(ess, 0xB, 0x3F37);
623 wp_wrreg(ess, 0xD, 0x7632);
625 wp_wrreg(ess, WPREG_BASE, 0x8598); /* Parallel I/O */
626 ringbus_setdest(ess, RINGBUS_SRC_ADC,
628 ringbus_setdest(ess, RINGBUS_SRC_DSOUND,
632 bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CTRL_B, 0x00);
633 bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CTRL_A, 0x03);
634 bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CTRL_C, 0x00);
640 if (esm_get_quirks(ess->subid) & ESM_QUIRKF_GPIO) {
641 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_MASK,
643 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR,
644 bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DIR) |
646 bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA,
650 DUMPREG(ess);
658 struct esm_softc *ess;
661 ess = sc;
662 p = &ess->sc_dma;
665 device_xname(ess->sc_dev), start);
669 ess->pch.base = DMAADDR(p) + MAESTRO_PLAYBUF_OFF;
672 device_xname(ess->sc_dev), ess->pch.base));
680 struct esm_softc *ess;
683 ess = sc;
684 p = &ess->sc_dma;
687 device_xname(ess->sc_dev), start);
691 switch (ess->rch.aputype) {
693 ess->rch.base = DMAADDR(p) + MAESTRO_RECBUF_L_OFF;
696 ess->rch.base = DMAADDR(p) + MAESTRO_RECBUF_OFF;
701 device_xname(ess->sc_dev), ess->rch.base));
711 struct esm_softc *ess;
722 ess = sc;
723 ch = &ess->pch;
730 if (ess->pactive) {
732 device_xname(ess->sc_dev));
737 ess->sc_pintr = intr;
738 ess->sc_parg = arg;
739 p = &ess->sc_dma;
742 device_xname(ess->sc_dev), start);
746 ess->pch.blocksize = blksize;
747 ess->pch.apublk = blksize >> 1;
748 ess->pactive = 1;
761 ess->pch.apublk >>= 1;
767 if (ess->codec_flags & AC97_HOST_SWAPPED_CHANNELS)
774 ess->pch.apublk <<= 1;
779 ess->pch.apubase = offset;
780 ess->pch.apubuf = size;
781 ess->pch.nextirq = ess->pch.apublk;
783 set_timer(ess);
784 wp_starttimer(ess);
790 wp_wrapu(ess, apuch + i, APUREG_WAVESPACE, wpwa & 0xff00);
791 wp_wrapu(ess, apuch + i, APUREG_CURPTR, offset);
792 wp_wrapu(ess, apuch + i, APUREG_ENDPTR, offset + size);
793 wp_wrapu(ess, apuch + i, APUREG_LOOPLEN, size - 1);
794 wp_wrapu(ess, apuch + i, APUREG_AMPLITUDE, 0xe800);
795 wp_wrapu(ess, apuch + i, APUREG_POSITION, 0x8f00
798 wp_wrapu(ess, apuch + i, APUREG_FREQ_LOBYTE, APU_plus6dB
800 wp_wrapu(ess, apuch + i, APUREG_FREQ_HIWORD, dv >> 8);
807 wc_wrchctl(ess, apuch, ch->wcreg_tpl);
809 wc_wrchctl(ess, apuch + 1, ch->wcreg_tpl);
811 wp_wrapu(ess, apuch, APUREG_APUTYPE,
814 wp_wrapu(ess, apuch + 1, APUREG_APUTYPE,
826 struct esm_softc *ess;
839 ess = sc;
840 ch = &ess->rch;
846 if (ess->ractive) {
848 device_xname(ess->sc_dev));
853 ess->sc_rintr = intr;
854 ess->sc_rarg = arg;
855 p = &ess->sc_dma;
858 device_xname(ess->sc_dev), start);
862 ess->rch.buffer = (void *)start;
863 ess->rch.offset = 0;
864 ess->rch.blocksize = blksize;
865 ess->rch.bufsize = ((char *)end - (char *)start);
866 ess->rch.apublk = blksize >> 1;
867 ess->ractive = 1;
875 ess->rch.apublk >>= 1;
881 ess->ractive = 0;
888 ess->rch.apubase = (choffset >> 1);
889 ess->rch.apubuf = size;
890 ess->rch.nextirq = ess->rch.apublk;
892 set_timer(ess);
893 wp_starttimer(ess);
905 wp_wrapu(ess, apuch + i, reg, 0);
910 wc_wrchctl(ess, apuch + i, chctl);
913 wp_wrapu(ess, apuch + i, APUREG_FREQ_LOBYTE, APU_plus6dB
915 wp_wrapu(ess, apuch + i, APUREG_FREQ_HIWORD, dv >> 8);
918 wp_wrapu(ess, apuch + i, APUREG_WAVESPACE, wpwa);
919 wp_wrapu(ess, apuch + i, APUREG_CURPTR, offset);
920 wp_wrapu(ess, apuch + i, APUREG_ENDPTR, offset + size);
921 wp_wrapu(ess, apuch + i, APUREG_LOOPLEN, size - 1);
922 wp_wrapu(ess, apuch + i, APUREG_EFFECTS_ENV, 0x00f0);
923 wp_wrapu(ess, apuch + i, APUREG_AMPLITUDE, 0xe800);
924 wp_wrapu(ess, apuch + i, APUREG_POSITION, 0x8f00
927 wp_wrapu(ess, apuch + i, APUREG_ROUTE, apuch + 2 + i);
935 wp_wrapu(ess, apuch + 2 + i, reg, 0);
938 chctl = (ess->rch.base + mixoffset - 0x10) &
940 wc_wrchctl(ess, apuch + 2 + i, chctl);
943 wp_wrapu(ess, apuch + 2 + i, APUREG_FREQ_LOBYTE, APU_plus6dB
945 wp_wrapu(ess, apuch + 2 + i, APUREG_FREQ_HIWORD, mixdv >> 8);
948 wp_wrapu(ess, apuch + 2 + i, APUREG_WAVESPACE, wpwa);
949 wp_wrapu(ess, apuch + 2 + i, APUREG_CURPTR, offset);
950 wp_wrapu(ess, apuch + 2 + i, APUREG_ENDPTR,
952 wp_wrapu(ess, apuch + 2 + i, APUREG_LOOPLEN, mixsize);
953 wp_wrapu(ess, apuch + 2 + i, APUREG_EFFECTS_ENV, 0x00f0);
954 wp_wrapu(ess, apuch + 2 + i, APUREG_AMPLITUDE, 0xe800);
955 wp_wrapu(ess, apuch + 2 + i, APUREG_POSITION, 0x8f00
958 wp_wrapu(ess, apuch + 2 + i, APUREG_ROUTE,
970 wp_wrapu(ess, apuch, APUREG_APUTYPE,
974 wp_wrapu(ess, apuch + 1, APUREG_APUTYPE,
977 wp_wrapu(ess, apuch + 2, APUREG_APUTYPE,
981 wp_wrapu(ess, apuch + 3, APUREG_APUTYPE,
991 struct esm_softc *ess;
995 ess = sc;
996 ch = &ess->pch;
998 wp_wrapu(ess, (ch->num << 1), APUREG_APUTYPE,
1000 wp_wrapu(ess, (ch->num << 1) + 1, APUREG_APUTYPE,
1003 ess->pactive = 0;
1004 if (!ess->ractive)
1005 wp_stoptimer(ess);
1013 struct esm_softc *ess;
1017 ess = sc;
1018 ch = &ess->rch;
1020 wp_wrapu(ess, (ch->num << 1), APUREG_APUTYPE,
1022 wp_wrapu(ess, (ch->num << 1) + 1, APUREG_APUTYPE,
1024 wp_wrapu(ess, (ch->num << 1) + 2, APUREG_APUTYPE,
1026 wp_wrapu(ess, (ch->num << 1) + 3, APUREG_APUTYPE,
1029 ess->ractive = 0;
1030 if (!ess->pactive)
1031 wp_stoptimer(ess);
1051 set_timer(struct esm_softc *ess)
1056 if (ess->pactive)
1057 freq = calc_timer_freq(&ess->pch);
1059 if (ess->ractive) {
1060 freq2 = calc_timer_freq(&ess->rch);
1071 wp_settimer(ess, freq);
1111 esmch_combine_input(struct esm_softc *ess, struct esm_chinfo *ch)
1127 left32s = (const uint32_t *)((char *)ess->sc_dma.addr +
1131 right32s = (const uint32_t *)((char *)ess->sc_dma.addr +
1209 struct esm_softc *ess;
1214 ess = sc;
1217 esmch_set_format(&ess->pch, play);
1219 esmch_set_format(&ess->rch, rec);
1227 struct esm_softc *ess;
1229 ess = sc;
1230 return ess->codec_if->vtbl->mixer_set_port(ess->codec_if, cp);
1236 struct esm_softc *ess;
1238 ess = sc;
1239 return ess->codec_if->vtbl->mixer_get_port(ess->codec_if, cp);
1245 struct esm_softc *ess;
1247 ess = sc;
1248 return ess->codec_if->vtbl->query_devinfo(ess->codec_if, dip);
1254 struct esm_softc *ess;
1259 ess = sc;
1263 if (ess->rings_alloced & direction) {
1272 ess->rings_alloced |= direction;
1276 (char *)ess->sc_dma.addr + off,
1277 (int)DMAADDR(&ess->sc_dma) + off));
1278 return (char *)ess->sc_dma.addr + off;
1284 struct esm_softc *ess;
1287 ess = sc;
1288 if ((char *)ptr == (char *)ess->sc_dma.addr + MAESTRO_PLAYBUF_OFF)
1289 ess->rings_alloced &= ~AUMODE_PLAY;
1290 else if ((char *)ptr == (char *)ess->sc_dma.addr + MAESTRO_RECBUF_OFF)
1291 ess->rings_alloced &= ~AUMODE_RECORD;
1321 struct esm_softc *ess;
1326 ess = sc;
1329 mutex_spin_enter(&ess->sc_intr_lock);
1330 status = bus_space_read_1(ess->st, ess->sh, PORT_HOSTINT_STAT);
1332 mutex_spin_exit(&ess->sc_intr_lock);
1337 bus_space_write_2(ess->st, ess->sh, PORT_INT_STAT, 1);
1338 bus_space_write_1(ess->st, ess->sh, PORT_HOSTINT_STAT, 0);
1342 delta = bus_space_read_1(ess->st, ess->sh, PORT_HWVOL_MASTER)
1345 mixer_set(device_get_softc(ess->dev),
1348 mixer_set(device_get_softc(ess->dev),
1350 mixer_get(device_get_softc(ess->dev),
1355 bus_space_write_1(ess->st, ess->sh, PORT_HWVOL_MASTER, 0x88);
1360 if (ess->pactive) {
1361 pos = wp_rdapu(ess, ess->pch.num << 1, APUREG_CURPTR);
1364 wp_rdapu(ess, (ess->pch.num<<1)+1, APUREG_CURPTR)));
1366 pos -= ess->pch.apubase;
1367 if (pos >= ess->pch.nextirq &&
1368 pos - ess->pch.nextirq < ess->pch.apubuf / 2) {
1369 ess->pch.nextirq += ess->pch.apublk;
1371 if (ess->pch.nextirq >= ess->pch.apubuf)
1372 ess->pch.nextirq = 0;
1374 if (ess->sc_pintr) {
1376 ess->sc_pintr(ess->sc_parg);
1383 if (ess->ractive) {
1384 pos = wp_rdapu(ess, ess->rch.num << 1, APUREG_CURPTR);
1387 wp_rdapu(ess, (ess->rch.num<<1)+1, APUREG_CURPTR)));
1389 pos -= ess->rch.apubase;
1390 if (pos >= ess->rch.nextirq &&
1391 pos - ess->rch.nextirq < ess->rch.apubuf / 2) {
1392 ess->rch.nextirq += ess->rch.apublk;
1394 if (ess->rch.nextirq >= ess->rch.apubuf)
1395 ess->rch.nextirq = 0;
1397 if (ess->sc_rintr) {
1399 switch(ess->rch.aputype) {
1401 esmch_combine_input(ess, &ess->rch);
1404 ess->sc_rintr(ess->sc_rarg);
1410 mutex_spin_exit(&ess->sc_intr_lock);
1501 struct esm_softc *ess;
1513 ess = device_private(self);
1514 ess->sc_dev = self;
1521 mutex_init(&ess->sc_lock, MUTEX_DEFAULT, IPL_NONE);
1522 mutex_init(&ess->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
1531 &ess->st, &ess->sh, NULL, &ess->sz)) {
1532 aprint_error_dev(ess->sc_dev, "can't map i/o space\n");
1533 mutex_destroy(&ess->sc_lock);
1534 mutex_destroy(&ess->sc_intr_lock);
1539 ess->pch.num = 0;
1540 ess->rch.num = 1;
1541 ess->dmat = pa->pa_dmat;
1542 ess->tag = tag;
1543 ess->pc = pc;
1544 ess->subid = pci_conf_read(pc, tag, PCI_SUBSYS_ID_REG);
1548 device_xname(ess->sc_dev),
1549 PCI_VENDOR(ess->subid), PCI_PRODUCT(ess->subid)));
1553 aprint_error_dev(ess->sc_dev, "can't map interrupt\n");
1554 mutex_destroy(&ess->sc_lock);
1555 mutex_destroy(&ess->sc_intr_lock);
1559 ess->ih = pci_intr_establish_xname(pc, ih, IPL_AUDIO, esm_intr, self,
1561 if (ess->ih == NULL) {
1562 aprint_error_dev(ess->sc_dev, "can't establish interrupt");
1566 mutex_destroy(&ess->sc_lock);
1567 mutex_destroy(&ess->sc_intr_lock);
1570 aprint_normal_dev(ess->sc_dev, "interrupting at %s\n", intrstr);
1579 aprint_error_dev(ess->sc_dev, "cannot activate %d\n", error);
1580 mutex_destroy(&ess->sc_lock);
1581 mutex_destroy(&ess->sc_intr_lock);
1600 esm_init(ess);
1602 esm_read_codec(ess, 0, &codec_data);
1604 aprint_error_dev(ess->sc_dev, "PT101 codec detected!\n");
1605 mutex_destroy(&ess->sc_lock);
1606 mutex_destroy(&ess->sc_intr_lock);
1616 if (esm_get_quirks(ess->subid) & ESM_QUIRKF_SWAPPEDCH) {
1617 ess->codec_flags |= AC97_HOST_SWAPPED_CHANNELS;
1619 ess->codec_flags |= AC97_HOST_DONT_READ;
1622 ess->host_if.arg = self;
1623 ess->host_if.attach = esm_attach_codec;
1624 ess->host_if.read = esm_read_codec;
1625 ess->host_if.write = esm_write_codec;
1626 ess->host_if.reset = esm_reset_codec;
1627 ess->host_if.flags = esm_flags_codec;
1629 if (ac97_attach(&ess->host_if, self, &ess->sc_lock) != 0) {
1630 mutex_destroy(&ess->sc_lock);
1631 mutex_destroy(&ess->sc_intr_lock);
1636 if (esm_allocmem(ess, MAESTRO_DMA_SZ, MAESTRO_DMA_ALIGN,
1637 &ess->sc_dma)) {
1638 aprint_error_dev(ess->sc_dev, "couldn't allocate memory!\n");
1639 mutex_destroy(&ess->sc_lock);
1640 mutex_destroy(&ess->sc_intr_lock);
1643 ess->rings_alloced = 0;
1647 wc_wrreg(ess, pcmbar,
1648 DMAADDR(&ess->sc_dma) >> WAVCACHE_BASEADDR_SHIFT);
1650 audio_attach_mi(&esm_hw_if, self, ess->sc_dev);
1666 struct esm_softc *ess = device_private(self);
1673 esm_freemem(ess, &ess->sc_dma);
1675 if (ess->codec_if != NULL) {
1676 mutex_enter(&ess->sc_lock);
1677 ess->codec_if->vtbl->detach(ess->codec_if);
1678 mutex_exit(&ess->sc_lock);
1685 if (ess->ih != NULL)
1686 pci_intr_disestablish(ess->pc, ess->ih);
1688 bus_space_unmap(ess->st, ess->sh, ess->sz);
1689 mutex_destroy(&ess->sc_lock);
1690 mutex_destroy(&ess->sc_intr_lock);
1698 struct esm_softc *ess = device_private(dv);
1700 mutex_enter(&ess->sc_lock);
1701 mutex_spin_enter(&ess->sc_intr_lock);
1702 wp_stoptimer(ess);
1703 bus_space_write_2(ess->st, ess->sh, PORT_HOSTINT_CTRL, 0);
1704 esm_halt_output(ess);
1705 esm_halt_input(ess);
1706 mutex_spin_exit(&ess->sc_intr_lock);
1709 esm_write_codec(ess, AC97_REG_POWER, 0xdf00);
1711 bus_space_write_4(ess->st, ess->sh, PORT_RINGBUS_CTRL, 0);
1713 mutex_exit(&ess->sc_lock);
1721 struct esm_softc *ess = device_private(dv);
1726 mutex_enter(&ess->sc_lock);
1727 mutex_spin_enter(&ess->sc_intr_lock);
1728 esm_init(ess);
1732 wc_wrreg(ess, pcmbar,
1733 DMAADDR(&ess->sc_dma) >> WAVCACHE_BASEADDR_SHIFT);
1734 mutex_spin_exit(&ess->sc_intr_lock);
1735 ess->codec_if->vtbl->restore_ports(ess->codec_if);
1736 mutex_spin_enter(&ess->sc_intr_lock);
1740 device_xname(ess->sc_dev));
1746 if (ess->pactive)
1747 esm_start_output(ess);
1748 if (ess->ractive)
1749 esm_start_input(ess);
1751 if (ess->pactive || ess->ractive) {
1752 set_timer(ess);
1753 wp_starttimer(ess);
1755 mutex_spin_exit(&ess->sc_intr_lock);
1756 mutex_exit(&ess->sc_lock);