Lines Matching refs:cpudata
939 struct vmx_cpudata *cpudata = vcpu->cpudata;
942 cpudata->vmcs_refcnt++;
943 if (cpudata->vmcs_refcnt > 1) {
945 KASSERT(vmx_vmptrst() == cpudata->vmcs_pa);
949 vmcs_ci = cpudata->vmcs_ci;
950 cpudata->vmcs_ci = (void *)0x00FFFFFFFFFFFFFF; /* clobber */
956 vmx_vmclear(&cpudata->vmcs_pa);
957 cpudata->vmcs_launched = false;
960 vmx_vmclear_remote(vmcs_ci, cpudata->vmcs_pa);
961 cpudata->vmcs_launched = false;
966 vmx_vmptrld(&cpudata->vmcs_pa);
972 struct vmx_cpudata *cpudata = vcpu->cpudata;
975 KASSERT(vmx_vmptrst() == cpudata->vmcs_pa);
976 KASSERT(cpudata->vmcs_refcnt > 0);
977 cpudata->vmcs_refcnt--;
979 if (cpudata->vmcs_refcnt > 0) {
983 cpudata->vmcs_ci = curcpu();
990 struct vmx_cpudata *cpudata = vcpu->cpudata;
993 KASSERT(vmx_vmptrst() == cpudata->vmcs_pa);
994 KASSERT(cpudata->vmcs_refcnt == 1);
995 cpudata->vmcs_refcnt--;
997 vmx_vmclear(&cpudata->vmcs_pa);
1006 struct vmx_cpudata *cpudata = vcpu->cpudata;
1014 cpudata->nmi_window_exit = true;
1017 cpudata->int_window_exit = true;
1026 struct vmx_cpudata *cpudata = vcpu->cpudata;
1033 cpudata->nmi_window_exit = false;
1036 cpudata->int_window_exit = false;
1078 struct vmx_cpudata *cpudata = vcpu->cpudata;
1124 cpudata->evt_pending = true;
1229 vmx_inkernel_exec_cpuid(struct vmx_cpudata *cpudata, uint64_t eax, uint64_t ecx)
1234 cpudata->gprs[NVMM_X64_GPR_RAX] = descs[0];
1235 cpudata->gprs[NVMM_X64_GPR_RBX] = descs[1];
1236 cpudata->gprs[NVMM_X64_GPR_RCX] = descs[2];
1237 cpudata->gprs[NVMM_X64_GPR_RDX] = descs[3];
1244 struct vmx_cpudata *cpudata = vcpu->cpudata;
1251 vmx_inkernel_exec_cpuid(cpudata, eax, ecx);
1256 vmx_inkernel_exec_cpuid(cpudata, eax, ecx);
1261 vmx_inkernel_exec_cpuid(cpudata, eax, ecx);
1267 cpudata->gprs[NVMM_X64_GPR_RAX] = vmx_cpuid_max_basic;
1270 cpudata->gprs[NVMM_X64_GPR_RAX] &= nvmm_cpuid_00000001.eax;
1272 cpudata->gprs[NVMM_X64_GPR_RBX] &= ~CPUID_LOCAL_APIC_ID;
1273 cpudata->gprs[NVMM_X64_GPR_RBX] |= __SHIFTIN(vcpu->cpuid,
1276 cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_00000001.ecx;
1277 cpudata->gprs[NVMM_X64_GPR_RCX] |= CPUID2_RAZ;
1279 cpudata->gprs[NVMM_X64_GPR_RCX] |= CPUID2_PCID;
1282 cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_00000001.edx;
1287 cpudata->gprs[NVMM_X64_GPR_RCX] &= ~CPUID2_OSXSAVE;
1293 cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
1294 cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
1295 cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
1296 cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
1302 cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
1303 cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
1304 cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
1305 cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
1310 cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
1311 cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_00000007.ebx;
1312 cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_00000007.ecx;
1313 cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_00000007.edx;
1315 cpudata->gprs[NVMM_X64_GPR_RBX] |= CPUID_SEF_INVPCID;
1319 cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
1320 cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
1321 cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
1322 cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
1328 cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
1329 cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
1330 cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
1331 cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
1334 cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
1335 cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
1336 cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
1337 cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
1342 cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
1343 cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
1344 cpudata->gprs[NVMM_X64_GPR_RCX] =
1347 cpudata->gprs[NVMM_X64_GPR_RDX] = vcpu->cpuid;
1351 cpudata->gprs[NVMM_X64_GPR_RAX] = ilog2(ncpus);
1352 cpudata->gprs[NVMM_X64_GPR_RBX] = ncpus;
1353 cpudata->gprs[NVMM_X64_GPR_RCX] =
1356 cpudata->gprs[NVMM_X64_GPR_RDX] = vcpu->cpuid;
1359 cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
1360 cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
1361 cpudata->gprs[NVMM_X64_GPR_RCX] = 0; /* LVLTYPE_INVAL */
1362 cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
1367 cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
1368 cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
1369 cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
1370 cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
1378 cpudata->gprs[NVMM_X64_GPR_RAX] = vmx_xcr0_mask & 0xFFFFFFFF;
1379 if (cpudata->gxcr0 & XCR0_SSE) {
1380 cpudata->gprs[NVMM_X64_GPR_RBX] = sizeof(struct fxsave);
1382 cpudata->gprs[NVMM_X64_GPR_RBX] = sizeof(struct save87);
1384 cpudata->gprs[NVMM_X64_GPR_RBX] += 64; /* XSAVE header */
1385 cpudata->gprs[NVMM_X64_GPR_RCX] = sizeof(struct fxsave) + 64;
1386 cpudata->gprs[NVMM_X64_GPR_RDX] = vmx_xcr0_mask >> 32;
1389 cpudata->gprs[NVMM_X64_GPR_RAX] &=
1392 cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
1393 cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
1394 cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
1397 cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
1398 cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
1399 cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
1400 cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
1407 cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
1408 cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
1409 cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
1410 cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
1416 cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
1417 cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
1418 cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
1419 cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
1426 cpudata->gprs[NVMM_X64_GPR_RAX] = VMX_CPUID_MAX_HYPERVISOR;
1427 cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
1428 cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
1429 cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
1430 memcpy(&cpudata->gprs[NVMM_X64_GPR_RBX], "___ ", 4);
1431 memcpy(&cpudata->gprs[NVMM_X64_GPR_RCX], "NVMM", 4);
1432 memcpy(&cpudata->gprs[NVMM_X64_GPR_RDX], " ___", 4);
1436 cpudata->gprs[NVMM_X64_GPR_RAX] = vmx_cpuid_max_extended;
1439 cpudata->gprs[NVMM_X64_GPR_RAX] &= nvmm_cpuid_80000001.eax;
1440 cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_80000001.ebx;
1441 cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_80000001.ecx;
1442 cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_80000001.edx;
1451 cpudata->gprs[NVMM_X64_GPR_RAX] &= nvmm_cpuid_80000007.eax;
1452 cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_80000007.ebx;
1453 cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_80000007.ecx;
1454 cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_80000007.edx;
1457 cpudata->gprs[NVMM_X64_GPR_RAX] &= nvmm_cpuid_80000008.eax;
1458 cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_80000008.ebx;
1459 cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_80000008.ecx;
1460 cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_80000008.edx;
1483 struct vmx_cpudata *cpudata = vcpu->cpudata;
1488 eax = cpudata->gprs[NVMM_X64_GPR_RAX];
1489 ecx = cpudata->gprs[NVMM_X64_GPR_RCX];
1490 vmx_inkernel_exec_cpuid(cpudata, eax, ecx);
1494 if (!cpudata->cpuidpresent[i]) {
1497 cpuid = &cpudata->cpuid[i];
1509 cpudata->gprs[NVMM_X64_GPR_RAX] &= ~cpuid->u.mask.del.eax;
1510 cpudata->gprs[NVMM_X64_GPR_RBX] &= ~cpuid->u.mask.del.ebx;
1511 cpudata->gprs[NVMM_X64_GPR_RCX] &= ~cpuid->u.mask.del.ecx;
1512 cpudata->gprs[NVMM_X64_GPR_RDX] &= ~cpuid->u.mask.del.edx;
1515 cpudata->gprs[NVMM_X64_GPR_RAX] |= cpuid->u.mask.set.eax;
1516 cpudata->gprs[NVMM_X64_GPR_RBX] |= cpuid->u.mask.set.ebx;
1517 cpudata->gprs[NVMM_X64_GPR_RCX] |= cpuid->u.mask.set.ecx;
1518 cpudata->gprs[NVMM_X64_GPR_RDX] |= cpuid->u.mask.set.edx;
1531 struct vmx_cpudata *cpudata = vcpu->cpudata;
1534 if (cpudata->int_window_exit) {
1573 struct vmx_cpudata *cpudata = vcpu->cpudata;
1588 fakecr0 = cpudata->gprs[gpr];
1629 cpudata->gtlb_want_flush = true;
1642 struct vmx_cpudata *cpudata = vcpu->cpudata;
1656 gpr = cpudata->gprs[gpr];
1669 cpudata->gtlb_want_flush = true;
1681 struct vmx_cpudata *cpudata = vcpu->cpudata;
1699 cpudata->gcr8 = vmx_vmread(VMCS_GUEST_RSP);
1701 cpudata->gcr8 = cpudata->gprs[gpr];
1703 if (cpudata->tpr.exit_changed) {
1708 vmx_vmwrite(VMCS_GUEST_RSP, cpudata->gcr8);
1710 cpudata->gprs[gpr] = cpudata->gcr8;
1823 struct vmx_cpudata *cpudata = vcpu->cpudata;
1830 cpudata->gprs[NVMM_X64_GPR_RAX] = (val & 0xFFFFFFFF);
1831 cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);
1835 val = cpudata->gmsr_misc_enable;
1836 cpudata->gprs[NVMM_X64_GPR_RAX] = (val & 0xFFFFFFFF);
1837 cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);
1854 cpudata->gprs[NVMM_X64_GPR_RAX] = (val & 0xFFFFFFFF);
1855 cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);
1862 cpudata->gprs[NVMM_X64_GPR_RAX] = (val & 0xFFFFFFFF);
1863 cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);
1868 cpudata->gtsc = exit->u.wrmsr.val;
1869 cpudata->gtsc_want_update = true;
1906 struct vmx_cpudata *cpudata = vcpu->cpudata;
1910 exit->u.rdmsr.msr = (cpudata->gprs[NVMM_X64_GPR_RCX] & 0xFFFFFFFF);
1928 struct vmx_cpudata *cpudata = vcpu->cpudata;
1931 rdx = cpudata->gprs[NVMM_X64_GPR_RDX];
1932 rax = cpudata->gprs[NVMM_X64_GPR_RAX];
1935 exit->u.wrmsr.msr = (cpudata->gprs[NVMM_X64_GPR_RCX] & 0xFFFFFFFF);
1954 struct vmx_cpudata *cpudata = vcpu->cpudata;
1959 val = (cpudata->gprs[NVMM_X64_GPR_RDX] << 32) |
1960 (cpudata->gprs[NVMM_X64_GPR_RAX] & 0xFFFFFFFF);
1962 if (__predict_false(cpudata->gprs[NVMM_X64_GPR_RCX] != 0)) {
1970 cpudata->gxcr0 = val;
2013 struct vmx_cpudata *cpudata = vcpu->cpudata;
2017 fpu_area_restore(&cpudata->gfpu, vmx_xcr0_mask, false);
2020 cpudata->hxcr0 = rdxcr(0);
2021 wrxcr(0, cpudata->gxcr0);
2028 struct vmx_cpudata *cpudata = vcpu->cpudata;
2031 cpudata->gxcr0 = rdxcr(0);
2032 wrxcr(0, cpudata->hxcr0);
2036 fpu_area_save(&cpudata->gfpu, vmx_xcr0_mask, false);
2043 struct vmx_cpudata *cpudata = vcpu->cpudata;
2049 ldr0(cpudata->drs[NVMM_X64_DR_DR0]);
2050 ldr1(cpudata->drs[NVMM_X64_DR_DR1]);
2051 ldr2(cpudata->drs[NVMM_X64_DR_DR2]);
2052 ldr3(cpudata->drs[NVMM_X64_DR_DR3]);
2053 ldr6(cpudata->drs[NVMM_X64_DR_DR6]);
2059 struct vmx_cpudata *cpudata = vcpu->cpudata;
2061 cpudata->drs[NVMM_X64_DR_DR0] = rdr0();
2062 cpudata->drs[NVMM_X64_DR_DR1] = rdr1();
2063 cpudata->drs[NVMM_X64_DR_DR2] = rdr2();
2064 cpudata->drs[NVMM_X64_DR_DR3] = rdr3();
2065 cpudata->drs[NVMM_X64_DR_DR6] = rdr6();
2073 struct vmx_cpudata *cpudata = vcpu->cpudata;
2081 cpudata->kernelgsbase = rdmsr(MSR_KERNELGSBASE);
2087 struct vmx_cpudata *cpudata = vcpu->cpudata;
2089 wrmsr(MSR_STAR, cpudata->star);
2090 wrmsr(MSR_LSTAR, cpudata->lstar);
2091 wrmsr(MSR_CSTAR, cpudata->cstar);
2092 wrmsr(MSR_SFMASK, cpudata->sfmask);
2093 wrmsr(MSR_KERNELGSBASE, cpudata->kernelgsbase);
2109 struct vmx_cpudata *cpudata = vcpu->cpudata;
2112 cpudata->gtlb_want_flush = true;
2119 struct vmx_cpudata *cpudata = vcpu->cpudata;
2122 if (__predict_true(!kcpuset_isset(cpudata->htlb_want_flush, hcpu))) {
2129 kcpuset_clear(cpudata->htlb_want_flush, hcpu);
2133 vmx_htlb_flush(struct vmx_machdata *machdata, struct vmx_cpudata *cpudata)
2139 if (__predict_true(machgen == cpudata->vcpu_htlb_gen)) {
2143 kcpuset_copy(cpudata->htlb_want_flush, kcpuset_running);
2153 vmx_htlb_flush_ack(struct vmx_cpudata *cpudata, uint64_t machgen)
2155 cpudata->vcpu_htlb_gen = machgen;
2156 kcpuset_clear(cpudata->htlb_want_flush, cpu_number());
2160 vmx_exit_evt(struct vmx_cpudata *cpudata)
2164 cpudata->evt_pending = false;
2183 cpudata->evt_pending = true;
2192 struct vmx_cpudata *cpudata = vcpu->cpudata;
2213 launched = cpudata->vmcs_launched;
2223 cpudata->gtsc_want_update = true;
2231 if (cpudata->gtlb_want_flush) {
2232 vpid_desc.vpid = cpudata->asid;
2235 cpudata->gtlb_want_flush = false;
2238 if (__predict_false(cpudata->gtsc_want_update)) {
2239 vmx_vmwrite(VMCS_TSC_OFFSET, cpudata->gtsc - rdtsc());
2240 cpudata->gtsc_want_update = false;
2245 machgen = vmx_htlb_flush(machdata, cpudata);
2246 lcr2(cpudata->gcr2);
2248 ret = vmx_vmresume(cpudata->gprs);
2250 ret = vmx_vmlaunch(cpudata->gprs);
2252 cpudata->gcr2 = rcr2();
2253 vmx_htlb_flush_ack(cpudata, machgen);
2261 vmx_exit_evt(cpudata);
2347 cpudata->vmcs_launched = launched;
2349 cpudata->gtsc = vmx_vmread(VMCS_TSC_OFFSET) + rdtsc();
2355 exit->exitstate.cr8 = cpudata->gcr8;
2359 exit->exitstate.int_window_exiting = cpudata->int_window_exit;
2360 exit->exitstate.nmi_window_exiting = cpudata->nmi_window_exit;
2361 exit->exitstate.evt_pending = cpudata->evt_pending;
2547 struct vmx_cpudata *cpudata = vcpu->cpudata;
2557 cpudata->gtlb_want_flush = true;
2573 CTASSERT(sizeof(cpudata->gprs) == sizeof(state->gprs));
2575 memcpy(cpudata->gprs, state->gprs, sizeof(state->gprs));
2595 cpudata->gcr2 = state->crs[NVMM_X64_CR_CR2];
2604 cpudata->gcr8 = state->crs[NVMM_X64_CR_CR8];
2608 cpudata->gxcr0 = state->crs[NVMM_X64_CR_XCR0];
2609 cpudata->gxcr0 &= vmx_xcr0_mask;
2610 cpudata->gxcr0 |= XCR0_X87;
2614 CTASSERT(sizeof(cpudata->drs) == sizeof(state->drs));
2616 memcpy(cpudata->drs, state->drs, sizeof(state->drs));
2618 cpudata->drs[NVMM_X64_DR_DR6] &= 0xFFFFFFFF;
2619 vmx_vmwrite(VMCS_GUEST_DR7, cpudata->drs[NVMM_X64_DR_DR7]);
2623 cpudata->gmsr[VMX_MSRLIST_STAR].val =
2625 cpudata->gmsr[VMX_MSRLIST_LSTAR].val =
2627 cpudata->gmsr[VMX_MSRLIST_CSTAR].val =
2629 cpudata->gmsr[VMX_MSRLIST_SFMASK].val =
2631 cpudata->gmsr[VMX_MSRLIST_KERNELGSBASE].val =
2645 cpudata->gtsc = state->msrs[NVMM_X64_MSR_TSC];
2646 cpudata->gtsc_want_update = true;
2679 CTASSERT(sizeof(cpudata->gfpu.xsh_fxsave) == sizeof(state->fpu));
2681 memcpy(cpudata->gfpu.xsh_fxsave, &state->fpu,
2684 fpustate = (struct fxsave *)cpudata->gfpu.xsh_fxsave;
2690 cpudata->gfpu.xsh_xstate_bv = vmx_xcr0_mask;
2705 struct vmx_cpudata *cpudata = vcpu->cpudata;
2725 CTASSERT(sizeof(cpudata->gprs) == sizeof(state->gprs));
2727 memcpy(state->gprs, cpudata->gprs, sizeof(state->gprs));
2738 state->crs[NVMM_X64_CR_CR2] = cpudata->gcr2;
2741 state->crs[NVMM_X64_CR_CR8] = cpudata->gcr8;
2742 state->crs[NVMM_X64_CR_XCR0] = cpudata->gxcr0;
2748 CTASSERT(sizeof(cpudata->drs) == sizeof(state->drs));
2750 memcpy(state->drs, cpudata->drs, sizeof(state->drs));
2757 cpudata->gmsr[VMX_MSRLIST_STAR].val;
2759 cpudata->gmsr[VMX_MSRLIST_LSTAR].val;
2761 cpudata->gmsr[VMX_MSRLIST_CSTAR].val;
2763 cpudata->gmsr[VMX_MSRLIST_SFMASK].val;
2765 cpudata->gmsr[VMX_MSRLIST_KERNELGSBASE].val;
2776 state->msrs[NVMM_X64_MSR_TSC] = cpudata->gtsc;
2783 state->intr.int_window_exiting = cpudata->int_window_exit;
2784 state->intr.nmi_window_exiting = cpudata->nmi_window_exit;
2785 state->intr.evt_pending = cpudata->evt_pending;
2788 CTASSERT(sizeof(cpudata->gfpu.xsh_fxsave) == sizeof(state->fpu));
2790 memcpy(&state->fpu, cpudata->gfpu.xsh_fxsave,
2820 struct vmx_cpudata *cpudata = vcpu->cpudata;
2833 cpudata->asid = i;
2865 struct vmx_cpudata *cpudata = vcpu->cpudata;
2866 struct vmcs *vmcs = cpudata->vmcs;
2867 struct msr_entry *gmsr = cpudata->gmsr;
2890 memset(cpudata->msrbm, 0xFF, MSRBM_SIZE);
2891 vmx_vcpu_msr_allow(cpudata->msrbm, MSR_EFER, true, true);
2892 vmx_vcpu_msr_allow(cpudata->msrbm, MSR_STAR, true, true);
2893 vmx_vcpu_msr_allow(cpudata->msrbm, MSR_LSTAR, true, true);
2894 vmx_vcpu_msr_allow(cpudata->msrbm, MSR_CSTAR, true, true);
2895 vmx_vcpu_msr_allow(cpudata->msrbm, MSR_SFMASK, true, true);
2896 vmx_vcpu_msr_allow(cpudata->msrbm, MSR_KERNELGSBASE, true, true);
2897 vmx_vcpu_msr_allow(cpudata->msrbm, MSR_SYSENTER_CS, true, true);
2898 vmx_vcpu_msr_allow(cpudata->msrbm, MSR_SYSENTER_ESP, true, true);
2899 vmx_vcpu_msr_allow(cpudata->msrbm, MSR_SYSENTER_EIP, true, true);
2900 vmx_vcpu_msr_allow(cpudata->msrbm, MSR_FSBASE, true, true);
2901 vmx_vcpu_msr_allow(cpudata->msrbm, MSR_GSBASE, true, true);
2902 vmx_vcpu_msr_allow(cpudata->msrbm, MSR_TSC, true, false);
2903 vmx_vmwrite(VMCS_MSR_BITMAP, (uint64_t)cpudata->msrbm_pa);
2921 vmx_vmwrite(VMCS_ENTRY_MSR_LOAD_ADDRESS, cpudata->gmsr_pa);
2922 vmx_vmwrite(VMCS_EXIT_MSR_STORE_ADDRESS, cpudata->gmsr_pa);
2960 cpudata->gmsr_misc_enable = rdmsr(MSR_MISC_ENABLE);
2961 cpudata->gmsr_misc_enable &=
2963 cpudata->gmsr_misc_enable |=
2967 cpudata->gfpu.xsh_xstate_bv = vmx_xcr0_mask;
2968 cpudata->gfpu.xsh_xcomp_bv = 0;
2971 cpudata->star = rdmsr(MSR_STAR);
2972 cpudata->lstar = rdmsr(MSR_LSTAR);
2973 cpudata->cstar = rdmsr(MSR_CSTAR);
2974 cpudata->sfmask = rdmsr(MSR_SFMASK);
2989 struct vmx_cpudata *cpudata;
2992 /* Allocate the VMX cpudata. */
2993 cpudata = (struct vmx_cpudata *)uvm_km_alloc(kernel_map,
2994 roundup(sizeof(*cpudata), PAGE_SIZE), 0,
2996 vcpu->cpudata = cpudata;
2999 error = vmx_memalloc(&cpudata->vmcs_pa, (vaddr_t *)&cpudata->vmcs,
3005 error = vmx_memalloc(&cpudata->msrbm_pa, (vaddr_t *)&cpudata->msrbm,
3011 error = vmx_memalloc(&cpudata->gmsr_pa, (vaddr_t *)&cpudata->gmsr, 1);
3015 kcpuset_create(&cpudata->htlb_want_flush, true);
3023 if (cpudata->vmcs_pa) {
3024 vmx_memfree(cpudata->vmcs_pa, (vaddr_t)cpudata->vmcs,
3027 if (cpudata->msrbm_pa) {
3028 vmx_memfree(cpudata->msrbm_pa, (vaddr_t)cpudata->msrbm,
3031 if (cpudata->gmsr_pa) {
3032 vmx_memfree(cpudata->gmsr_pa, (vaddr_t)cpudata->gmsr, 1);
3035 kmem_free(cpudata, sizeof(*cpudata));
3042 struct vmx_cpudata *cpudata = vcpu->cpudata;
3048 kcpuset_destroy(cpudata->htlb_want_flush);
3050 vmx_memfree(cpudata->vmcs_pa, (vaddr_t)cpudata->vmcs, VMCS_NPAGES);
3051 vmx_memfree(cpudata->msrbm_pa, (vaddr_t)cpudata->msrbm, MSRBM_NPAGES);
3052 vmx_memfree(cpudata->gmsr_pa, (vaddr_t)cpudata->gmsr, 1);
3053 uvm_km_free(kernel_map, (vaddr_t)cpudata,
3054 roundup(sizeof(*cpudata), PAGE_SIZE), UVM_KMF_WIRED);
3060 vmx_vcpu_configure_cpuid(struct vmx_cpudata *cpudata, void *data)
3079 if (!cpudata->cpuidpresent[i]) {
3082 if (cpudata->cpuid[i].leaf == cpuid->leaf) {
3083 cpudata->cpuidpresent[i] = false;
3091 if (!cpudata->cpuidpresent[i]) {
3094 if (cpudata->cpuid[i].leaf == cpuid->leaf) {
3095 memcpy(&cpudata->cpuid[i], cpuid,
3103 if (!cpudata->cpuidpresent[i]) {
3104 cpudata->cpuidpresent[i] = true;
3105 memcpy(&cpudata->cpuid[i], cpuid,
3115 vmx_vcpu_configure_tpr(struct vmx_cpudata *cpudata, void *data)
3119 memcpy(&cpudata->tpr, tpr, sizeof(*tpr));
3126 struct vmx_cpudata *cpudata = vcpu->cpudata;
3130 return vmx_vcpu_configure_cpuid(cpudata, data);
3132 return vmx_vcpu_configure_tpr(cpudata, data);
3141 struct vmx_cpudata *cpudata = vcpu->cpudata;
3144 KASSERT(cpudata->vmcs_refcnt == 0);
3146 vmcs_ci = cpudata->vmcs_ci;
3147 cpudata->vmcs_ci = (void *)0x00FFFFFFFFFFFFFF; /* clobber */
3154 vmx_vmclear_remote(vmcs_ci, cpudata->vmcs_pa);
3157 vmx_vmclear(&cpudata->vmcs_pa);
3165 struct vmx_cpudata *cpudata = vcpu->cpudata;
3167 KASSERT(cpudata->vmcs_refcnt == 0);
3170 cpudata->vmcs_ci = NULL;