Lines Matching refs:ETH__BIT
43 #define ETH__BIT(bit) (1U << (bit))
45 #define ETH__MASK(bit) (ETH__BIT(bit) - 1)
79 #define TX_STS_LC ETH__BIT(5) /* Late Collision */
80 #define TX_STS_UR ETH__BIT(6) /* Underrun error */
81 #define TX_STS_RL ETH__BIT(8) /* Retransmit Limit (excession coll) */
82 #define TX_STS_COL ETH__BIT(9) /* Collision Occurred */
84 #define TX_STS_ES ETH__BIT(15) /* Error Summary (LC|UR|RL) */
85 #define TX_CMD_L ETH__BIT(16) /* Last - End Of Packet */
86 #define TX_CMD_F ETH__BIT(17) /* First - Start Of Packet */
87 #define TX_CMD_P ETH__BIT(18) /* Pad Packet */
88 #define TX_CMD_GC ETH__BIT(22) /* Generate CRC */
89 #define TX_CMD_EI ETH__BIT(23) /* Enable Interrupt */
90 #define TX_CMD_AM ETH__BIT(30) /* Auto Mode */
91 #define TX_CMD_O ETH__BIT(31) /* Ownership (1=GT 0=CPU) */
100 #define RX_STS_CE ETH__BIT(0) /* CRC Error */
101 #define RX_STS_COL ETH__BIT(1) /* Collision sensed during reception */
102 #define RX_STS_LC ETH__BIT(5) /* Late Collision (Reserved) */
103 #define RX_STS_OR ETH__BIT(6) /* Overrun Error */
104 #define RX_STS_MFL ETH__BIT(7) /* Max Frame Len Error */
105 #define RX_STS_SF ETH__BIT(8) /* Short Frame Error (< 64 bytes) */
106 #define RX_STS_FT ETH__BIT(11) /* Frame Type (1 = 802.3) */
107 #define RX_STS_M ETH__BIT(12) /* Missed Frame */
108 #define RX_STS_HE ETH__BIT(13) /* Hash Expired (manual match) */
109 #define RX_STS_IGMP ETH__BIT(14) /* IGMP Packet */
110 #define RX_STS_ES ETH__BIT(15) /* Error Summary (CE|COL|LC|OR|MFL|SF) */
111 #define RX_CMD_L ETH__BIT(16) /* Last - End Of Packet */
112 #define RX_CMD_F ETH__BIT(17) /* First - Start Of Packet */
113 #define RX_CMD_EI ETH__BIT(23) /* Enable Interrupt */
114 #define RX_CMD_AM ETH__BIT(30) /* Auto Mode */
115 #define RX_CMD_O ETH__BIT(31) /* Ownership (1=GT 0=CPU) */
184 #define ETH_ESMIR_ReadOpcode ETH__BIT(26)
185 #define ETH_ESMIR_ReadValid ETH__BIT(27)
186 #define ETH_ESMIR_Busy ETH__BIT(28)
243 #define ETH_EPCR_PM ETH__BIT(0)
244 #define ETH_EPCR_RBM ETH__BIT(1)
245 #define ETH_EPCR_PBF ETH__BIT(2)
246 #define ETH_EPCR_EN ETH__BIT(7)
247 #define ETH_EPCR_LPBK_GET(v) ETH__BIT(v, 8, 2)
251 #define ETH_EPCR_FC ETH__BIT(10)
253 #define ETH_EPCR_HS ETH__BIT(12)
257 #define ETH_EPCR_HM ETH__BIT(13)
261 #define ETH_EPCR_HDM ETH__BIT(14)
268 #define ETH_EPCR_ACCS ETH__BIT(31)
345 #define ETH_EPCXR_IGMP ETH__BIT(0)
346 #define ETH_EPCXR_SPAN ETH__BIT(1)
347 #define ETH_EPCXR_PAR ETH__BIT(2)
350 #define ETH_EPCXR_PRIOrx_Override ETH__BIT(8)
351 #define ETH_EPCXR_DLPXen ETH__BIT(9)
352 #define ETH_EPCXR_FCTLen ETH__BIT(10)
353 #define ETH_EPCXR_FLP ETH__BIT(11)
354 #define ETH_EPCXR_FCTL ETH__BIT(12)
362 #define ETH_EPCXR_MIBclrMode ETH__BIT(16)
363 #define ETH_EPCXR_MIBctrMode ETH__BIT(17)
364 #define ETH_EPCXR_Speed ETH__BIT(18)
365 #define ETH_EPCXR_SpeedEn ETH__BIT(19)
366 #define ETH_EPCXR_RMIIEn ETH__BIT(20)
367 #define ETH_EPCXR_DSCPEn ETH__BIT(21)
390 #define ETH_EPCMR_FJ ETH__BIT(15)
418 #define ETH_EPSR_Speed ETH__BIT(0)
419 #define ETH_EPSR_Duplex ETH__BIT(1)
420 #define ETH_EPSR_Fctl ETH__BIT(2)
421 #define ETH_EPSR_Link ETH__BIT(3)
422 #define ETH_EPSR_Pause ETH__BIT(4)
423 #define ETH_EPSR_TxLow ETH__BIT(5)
424 #define ETH_EPSR_TxHigh ETH__BIT(6)
425 #define ETH_EPSR_TXinProg ETH__BIT(7)
474 #define ETH_ESPR_Limit4(v) ETH__BIT(22)
543 #define ETH_ESDCR_BLMR ETH__BIT(6)
544 #define ETH_ESDCR_BLMT ETH__BIT(7)
545 #define ETH_ESDCR_POVR ETH__BIT(8)
546 #define ETH_ESDCR_RIFB ETH__BIT(9)
611 #define ETH_ESDCMR_ERD ETH__BIT(7)
612 #define ETH_ESDCMR_AR ETH__BIT(15)
613 #define ETH_ESDCMR_STDH ETH__BIT(16)
614 #define ETH_ESDCMR_STDL ETH__BIT(17)
615 #define ETH_ESDCMR_TXDH ETH__BIT(23)
616 #define ETH_ESDCMR_TXDL ETH__BIT(24)
617 #define ETH_ESDCMR_AT ETH__BIT(31)
730 #define ETH_IR_RxBuffer ETH__BIT(0)
731 #define ETH_IR_TxBufferHigh ETH__BIT(2)
732 #define ETH_IR_TxBufferLow ETH__BIT(3)
733 #define ETH_IR_TxEndHigh ETH__BIT(6)
734 #define ETH_IR_TxEndLow ETH__BIT(7)
735 #define ETH_IR_RxError ETH__BIT(8)
736 #define ETH_IR_TxErrorHigh ETH__BIT(10)
737 #define ETH_IR_TxErrorLow ETH__BIT(11)
738 #define ETH_IR_RxOVR ETH__BIT(12)
739 #define ETH_IR_TxUdr ETH__BIT(13)
740 #define ETH_IR_RxBuffer_0 ETH__BIT(16)
741 #define ETH_IR_RxBuffer_1 ETH__BIT(17)
742 #define ETH_IR_RxBuffer_2 ETH__BIT(18)
743 #define ETH_IR_RxBuffer_3 ETH__BIT(19)
745 #define ETH_IR_RxError_0 ETH__BIT(20)
746 #define ETH_IR_RxError_1 ETH__BIT(21)
747 #define ETH_IR_RxError_2 ETH__BIT(22)
748 #define ETH_IR_RxError_3 ETH__BIT(23)
758 #define ETH_IR_MIIPhySTC ETH__BIT(28)
759 #define ETH_IR_SMIdone ETH__BIT(29)
760 #define ETH_IR_EtherIntSum ETH__BIT(31)
761 #define ETH_IR_Summary ETH__BIT(31)