dev/ic/nvme.c

700 	struct nvme_sqe sqe;
724 	memset(&sqe, 0, sizeof(sqe));
725 	sqe.opcode = NVM_ADMIN_IDENTIFY;
726 	htolem32(&sqe.nsid, nsid);
727 	htolem64(&sqe.entry.prp[0], NVME_DMA_DVA(mem));
728 	htolem32(&sqe.cdw10, 0);
731 	ccb->ccb_cookie = &sqe;
827 	struct nvme_sqe_io *sqe = slot;
830 	sqe->opcode = ISSET(ccb->nnc_flags, NVME_NS_CTX_F_READ) ?
832 	htolem32(&sqe->nsid, ccb->nnc_nsid);
834 	htolem64(&sqe->entry.prp[0], dmap->dm_segs[0].ds_addr);
839 		htolem64(&sqe->entry.prp[1], dmap->dm_segs[1].ds_addr);
843 		htolem64(&sqe->entry.prp[1], ccb->ccb_prpl_dva);
847 	htolem64(&sqe->slba, ccb->nnc_blkno);
850 		htolem16(&sqe->ioflags, NVM_SQE_IO_FUA);
854 	htolem16(&sqe->nlb, (ccb->nnc_datasize / ccb->nnc_secsize) - 1);
945 	struct nvme_sqe *sqe = slot;
947 	sqe->opcode = NVM_CMD_FLUSH;
948 	htolem32(&sqe->nsid, ccb->nnc_nsid);
1018 	struct nvme_sqe *sqe = slot;
1020 	sqe->opcode = NVM_ADMIN_GET_FEATURES;
1021 	htolem32(&sqe->cdw10, NVM_FEATURE_VOLATILE_WRITE_CACHE);
1022 	htolem32(&sqe->cdw11, NVM_VOLATILE_WRITE_CACHE_WCE);
1084 	struct nvme_sqe *sqe = slot;
1087 	sqe->opcode = NVM_ADMIN_SET_FEATURES;
1088 	htolem32(&sqe->cdw10, NVM_FEATURE_VOLATILE_WRITE_CACHE);
1090 		htolem32(&sqe->cdw11, NVM_VOLATILE_WRITE_CACHE_WCE);
1181 	struct nvme_sqe *sqe = slot;
1187 	sqe->opcode = pt->cmd.opcode;
1188 	htolem32(&sqe->nsid, pt->cmd.nsid);
1191 		htolem64(&sqe->entry.prp[0], dmap->dm_segs[0].ds_addr);
1196 			htolem64(&sqe->entry.prp[1], dmap->dm_segs[1].ds_addr);
1208 			htolem64(&sqe->entry.prp[1], ccb->ccb_prpl_dva);
1213 	htolem32(&sqe->cdw10, pt->cmd.cdw10);
1214 	htolem32(&sqe->cdw11, pt->cmd.cdw11);
1215 	htolem32(&sqe->cdw12, pt->cmd.cdw12);
1216 	htolem32(&sqe->cdw13, pt->cmd.cdw13);
1217 	htolem32(&sqe->cdw14, pt->cmd.cdw14);
1218 	htolem32(&sqe->cdw15, pt->cmd.cdw15);
1366 	struct nvme_sqe *sqe = NVME_DMA_KVA(q->q_sq_dmamem);
1371 	sqe += tail;
1374 	    sizeof(*sqe) * tail, sizeof(*sqe), BUS_DMASYNC_POSTWRITE);
1375 	memset(sqe, 0, sizeof(*sqe));
1376 	(*fill)(q, ccb, sqe);
1377 	htolem16(&sqe->cid, ccb->ccb_id);
1379 	    sizeof(*sqe) * tail, sizeof(*sqe), BUS_DMASYNC_PREWRITE);
1444 	struct nvme_sqe *sqe = slot;
1447 	*sqe = state->s;
1639 	struct nvme_sqe_q sqe;
1650 	ccb->ccb_cookie = &sqe;
1652 	memset(&sqe, 0, sizeof(sqe));
1653 	sqe.opcode = NVM_ADMIN_ADD_IOCQ;
1654 	htolem64(&sqe.prp1, NVME_DMA_DVA(q->q_cq_dmamem));
1655 	htolem16(&sqe.qsize, q->q_entries - 1);
1656 	htolem16(&sqe.qid, q->q_id);
1657 	sqe.qflags = NVM_SQE_CQ_IEN | NVM_SQE_Q_PC;
1659 		htolem16(&sqe.cqid, q->q_id);	/* qid == vector */
1666 	ccb->ccb_cookie = &sqe;
1668 	memset(&sqe, 0, sizeof(sqe));
1669 	sqe.opcode = NVM_ADMIN_ADD_IOSQ;
1670 	htolem64(&sqe.prp1, NVME_DMA_DVA(q->q_sq_dmamem));
1671 	htolem16(&sqe.qsize, q->q_entries - 1);
1672 	htolem16(&sqe.qid, q->q_id);
1673 	htolem16(&sqe.cqid, q->q_id);
1674 	sqe.qflags = NVM_SQE_Q_PC;
1694 	struct nvme_sqe_q sqe;
1702 	ccb->ccb_cookie = &sqe;
1704 	memset(&sqe, 0, sizeof(sqe));
1705 	sqe.opcode = NVM_ADMIN_DEL_IOSQ;
1706 	htolem16(&sqe.qid, q->q_id);
1713 	ccb->ccb_cookie = &sqe;
1715 	memset(&sqe, 0, sizeof(sqe));
1716 	sqe.opcode = NVM_ADMIN_DEL_IOCQ;
1717 	htolem16(&sqe.qid, q->q_id);
1737 	struct nvme_sqe *sqe = slot;
1740 	sqe->opcode = NVM_ADMIN_IDENTIFY;
1741 	htolem64(&sqe->entry.prp[0], NVME_DMA_DVA(mem));
1742 	htolem32(&sqe->cdw10, 1);
1809 		    sc->sc_max_sgl + 1 /* we get a free prp in the sqe */,