Lines Matching refs:mvport
75 #define MVSATA_DEV2(mvport) ((mvport)->port_ata_channel.ch_atac->atac_dev)
81 #define MVSATA_EDMA_READ_4(mvport, reg) \
82 bus_space_read_4((mvport)->port_iot, (mvport)->port_ioh, (reg))
83 #define MVSATA_EDMA_WRITE_4(mvport, reg, val) \
84 bus_space_write_4((mvport)->port_iot, (mvport)->port_ioh, (reg), (val))
85 #define MVSATA_WDC_READ_2(mvport, reg) \
86 bus_space_read_2((mvport)->port_iot, (mvport)->port_ioh, \
88 #define MVSATA_WDC_READ_1(mvport, reg) \
89 bus_space_read_1((mvport)->port_iot, (mvport)->port_ioh, \
91 #define MVSATA_WDC_WRITE_2(mvport, reg, val) \
92 bus_space_write_2((mvport)->port_iot, (mvport)->port_ioh, \
94 #define MVSATA_WDC_WRITE_1(mvport, reg, val) \
95 bus_space_write_1((mvport)->port_iot, (mvport)->port_ioh, \
249 mvsata_pmp_select(struct mvsata_port *mvport, int pmpport)
255 if ((MVSATA_EDMA_READ_4(mvport, EDMA_CMD) & EDMA_CMD_EENEDMA) != 0) {
260 ifctl = MVSATA_EDMA_READ_4(mvport, SATA_SATAICTL);
263 MVSATA_EDMA_WRITE_4(mvport, SATA_SATAICTL, ifctl);
273 struct mvsata_port *mvport;
371 mvport = mvhc->hc_ports[port];
373 read_preamps(mvport) : 0x00000720;
374 mvport->_fix_phy_param.pre_amps = pre_amps;
375 mvport->_fix_phy_param._fix_phy = _fix_phy;
378 mvsata_reset_port(mvport);
392 mvport = sc->sc_hcs[hc].hc_ports[port];
393 if (mvport == NULL)
396 mvport->_fix_phy_param._fix_phy(mvport);
408 struct mvsata_port *mvport;
422 mvport = mvhc->hc_ports[port];
426 handled = mvsata_edma_handle(mvport, NULL);
433 (void) mvsata_nondma_handle(mvport);
444 mvsata_nondma_handle(struct mvsata_port *mvport)
446 struct ata_channel *chp = &mvport->port_ata_channel;
460 device_xname(MVSATA_DEV2(mvport)), chp->ch_channel,
470 mvsata_error(struct mvsata_port *mvport)
472 struct mvsata_softc *sc = device_private(MVSATA_DEV2(mvport));
475 cause = MVSATA_EDMA_READ_4(mvport, EDMA_IEC);
481 MVSATA_EDMA_WRITE_4(mvport, SATA_SE,
482 MVSATA_EDMA_READ_4(mvport, SATA_SEIM));
485 MVSATA_EDMA_WRITE_4(mvport, SATA_FISIC,
486 ~MVSATA_EDMA_READ_4(mvport, SATA_FISIM));
488 MVSATA_EDMA_WRITE_4(mvport, EDMA_IEC, ~cause);
492 device_xname(MVSATA_DEV2(mvport)), mvport->port_hc->hc,
493 mvport->port, cause, MVSATA_EDMA_READ_4(mvport, EDMA_IEM),
494 MVSATA_EDMA_READ_4(mvport, EDMA_S)));
496 cause &= MVSATA_EDMA_READ_4(mvport, EDMA_IEM);
502 device_xname(MVSATA_DEV2(mvport)),
503 mvport->port_hc->hc, mvport->port);
507 mvsata_devconn_gen1(mvport);
515 switch (mvport->port_edmamode_curr) {
519 mvsata_edma_reset_qptr(mvport);
520 mvsata_edma_enable(mvport);
530 device_xname(MVSATA_DEV2(mvport)),
531 mvport->port_hc->hc, mvport->port, cause));
539 device_xname(MVSATA_DEV2(mvport)),
540 mvport->port_hc->hc, mvport->port);
543 struct ata_channel *chp = &mvport->port_ata_channel;
546 device_xname(MVSATA_DEV2(mvport)),
547 mvport->port_hc->hc, mvport->port);
562 struct mvsata_port * const mvport = (struct mvsata_port *)chp;
572 drive = MVSATA_EDMA_READ_4(mvport, SATA_SATAICTL) & 0xf;
596 struct mvsata_port * const mvport = (struct mvsata_port *)chp;
601 sstat = sata_reset_interface(chp, mvport->port_iot,
602 mvport->port_sata_scontrol, mvport->port_sata_sstatus, AT_WAIT);
605 mvsata_pmp_select(mvport, PMP_PORT_CTL);
606 sig = mvsata_softreset(mvport, AT_WAIT);
621 struct mvsata_port *mvport = (struct mvsata_port *)chp;
627 edma_c = MVSATA_EDMA_READ_4(mvport, EDMA_CMD);
631 device_xname(MVSATA_DEV2(mvport)), chp->ch_channel, drvp->drive,
635 mvsata_edma_disable(mvport, 10000, flags);
637 mvsata_pmp_select(mvport, drvp->drive);
639 sig = mvsata_softreset(mvport, flags);
645 mvsata_edma_reset_qptr(mvport);
646 mvsata_edma_enable(mvport);
653 struct mvsata_port *mvport = (struct mvsata_port *)chp;
654 struct mvsata_softc *sc = device_private(MVSATA_DEV2(mvport));
658 device_xname(MVSATA_DEV2(mvport)), chp->ch_channel));
662 mvsata_hreset_port(mvport);
663 sstat = sata_reset_interface(chp, mvport->port_iot,
664 mvport->port_sata_scontrol, mvport->port_sata_sstatus, flags);
672 bus_space_write_4(mvport->port_iot,
673 mvport->port_sata_scontrol, 0, val);
675 ctrl = MVSATA_EDMA_READ_4(mvport, SATA_SATAICFG);
677 MVSATA_EDMA_WRITE_4(mvport, SATA_SATAICFG, ctrl);
679 mvsata_hreset_port(mvport);
680 sata_reset_interface(chp, mvport->port_iot,
681 mvport->port_sata_scontrol, mvport->port_sata_sstatus,
687 mvsata_edma_config(mvport, mvport->port_edmamode_curr);
688 mvsata_edma_reset_qptr(mvport);
689 mvsata_edma_enable(mvport);
885 struct mvsata_port *mvport = (struct mvsata_port *)chp;
895 device_xname(MVSATA_DEV2(mvport)), chp->ch_channel));
924 if (mvport->port_crqb != NULL)
925 mvsata_edma_resource_purge(mvport, mvport->port_dmat,
926 mvport->port_crqb_dmamap, mvport->port_crqb);
927 if (mvport->port_crpb != NULL)
928 mvsata_edma_resource_purge(mvport, mvport->port_dmat,
929 mvport->port_crpb_dmamap, mvport->port_crpb);
930 if (mvport->port_eprd != NULL)
931 mvsata_edma_resource_purge(mvport, mvport->port_dmat,
932 mvport->port_eprd_dmamap, mvport->port_eprd);
937 if (mvport->port_crqb == NULL)
938 mvport->port_crqb = mvsata_edma_resource_prepare(mvport,
939 mvport->port_dmat, &mvport->port_crqb_dmamap, crqb_size, 1);
940 if (mvport->port_crpb == NULL)
941 mvport->port_crpb = mvsata_edma_resource_prepare(mvport,
942 mvport->port_dmat, &mvport->port_crpb_dmamap, crpb_size, 0);
943 if (mvport->port_eprd == NULL) {
944 mvport->port_eprd = mvsata_edma_resource_prepare(mvport,
945 mvport->port_dmat, &mvport->port_eprd_dmamap, eprd_buf_size,
948 mvport->port_reqtbl[i].eprd_offset =
950 mvport->port_reqtbl[i].eprd = mvport->port_eprd +
955 if (mvport->port_crqb == NULL || mvport->port_crpb == NULL ||
956 mvport->port_eprd == NULL) {
957 aprint_error_dev(MVSATA_DEV2(mvport),
973 mvsata_edma_config(mvport, edma_mode);
974 mvsata_edma_reset_qptr(mvport);
975 mvsata_edma_enable(mvport);
1017 struct mvsata_port *mvport = (struct mvsata_port *)chp;
1018 struct mvsata_softc *sc = device_private(MVSATA_DEV2(mvport));
1079 if (mvport->port_edmamode_curr != dmamode)
1080 mvsata_edma_config(mvport, dmamode);
1083 sc->sc_enable_intr(mvport, 0 /*off*/);
1084 error = mvsata_edma_enqueue(mvport, xfer);
1146 if (mvport->port_edmamode_curr != nodma)
1147 mvsata_edma_disable(mvport, 10 /* ms */, wait_flags);
1149 mvsata_pmp_select(mvport, xfer->c_drive);
1167 if (mvsata_bio_ready(mvport, ata_bio, xfer->c_drive,
1174 MVSATA_WDC_WRITE_1(mvport, SRB_H, WDSD_IBM);
1227 == (mvport->port_edmamode_curr != nodma),
1229 xfer->c_flags, mvport->port_edmamode_curr, nodma);
1251 struct mvsata_port *mvport = (struct mvsata_port *)chp;
1252 struct mvsata_softc *sc = device_private(MVSATA_DEV2(mvport));
1257 mvsata_edma_wait(mvport, xfer, ATA_DELAY);
1258 sc->sc_enable_intr(mvport, 1 /*on*/);
1404 struct mvsata_port *mvport = (struct mvsata_port *)chp;
1415 if (!(xfer->c_flags & C_DMA) && mvport->port_edmamode_curr != nodma) {
1416 mvsata_edma_reset_qptr(mvport);
1417 mvsata_edma_enable(mvport);
1450 struct mvsata_port *mvport = (struct mvsata_port *)chp;
1457 device_xname(MVSATA_DEV2(mvport)), chp->ch_channel, xfer->c_drive,
1461 if (!(xfer->c_flags & C_DMA) && mvport->port_edmamode_curr != nodma) {
1462 mvsata_edma_reset_qptr(mvport);
1463 mvsata_edma_enable(mvport);
1482 mvsata_bio_ready(struct mvsata_port *mvport, struct ata_bio *ata_bio, int drive,
1485 struct ata_channel *chp = &mvport->port_ata_channel;
1499 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_4BIT | WDCTL_IDS);
1500 MVSATA_WDC_WRITE_1(mvport, SRB_H, WDSD_IBM);
1565 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_4BIT);
1587 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_4BIT);
1629 struct mvsata_port *mvport = (struct mvsata_port *)chp;
1637 device_xname(MVSATA_DEV2(mvport)), chp->ch_channel, drive));
1643 if (mvport->port_edmamode_curr != nodma)
1644 mvsata_edma_disable(mvport, 10 /* ms */, wait_flags);
1646 mvsata_pmp_select(mvport, drive);
1648 MVSATA_WDC_WRITE_1(mvport, SRB_H, WDSD_IBM);
1661 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_4BIT | WDCTL_IDS);
1700 struct mvsata_port *mvport = (struct mvsata_port *)chp;
1736 device_xname(MVSATA_DEV2(mvport)), chp->ch_channel,
1746 MVSATA_WDC_WRITE_1(mvport, SRB_H, WDSD_IBM);
1821 struct mvsata_port *mvport = (struct mvsata_port *)chp;
1827 device_xname(MVSATA_DEV2(mvport)), chp->ch_channel, xfer->c_drive));
1843 aprint_error_dev(MVSATA_DEV2(mvport),
1857 struct mvsata_port *mvport = (struct mvsata_port *)chp;
1872 ata_c->r_status = MVSATA_WDC_READ_1(mvport, SRB_CS);
1873 ata_c->r_error = MVSATA_WDC_READ_1(mvport, SRB_FE);
1874 ata_c->r_count = MVSATA_WDC_READ_1(mvport, SRB_SC);
1876 (uint64_t)MVSATA_WDC_READ_1(mvport, SRB_LBAL) << 0;
1878 (uint64_t)MVSATA_WDC_READ_1(mvport, SRB_LBAM) << 8;
1880 (uint64_t)MVSATA_WDC_READ_1(mvport, SRB_LBAH) << 16;
1881 ata_c->r_device = MVSATA_WDC_READ_1(mvport, SRB_H);
1884 MVSATA_WDC_WRITE_1(mvport, SRB_CAS,
1887 MVSATA_WDC_WRITE_1(mvport, SRB_CAS,
1891 MVSATA_WDC_READ_1(mvport, SRB_SC) << 8;
1893 (uint64_t)MVSATA_WDC_READ_1(mvport, SRB_LBAL) << 24;
1895 (uint64_t)MVSATA_WDC_READ_1(mvport, SRB_LBAM) << 32;
1897 (uint64_t)MVSATA_WDC_READ_1(mvport, SRB_LBAH) << 40;
1899 MVSATA_WDC_WRITE_1(mvport, SRB_CAS,
1902 MVSATA_WDC_WRITE_1(mvport, SRB_CAS,
1913 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_4BIT);
1925 struct mvsata_port *mvport = (struct mvsata_port *)chp;
1929 if (mvport->port_edmamode_curr != nodma) {
1930 mvsata_edma_reset_qptr(mvport);
1931 mvsata_edma_enable(mvport);
2007 struct mvsata_port *mvport = (struct mvsata_port *)chp;
2023 if (mvport->port_edmamode_curr != nodma)
2024 mvsata_edma_disable(mvport, 10 /* ms */, wait_flags);
2026 mvsata_pmp_select(mvport, xfer->c_drive);
2042 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_4BIT | WDCTL_IDS);
2044 MVSATA_WDC_WRITE_1(mvport, SRB_H, WDSD_IBM);
2113 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_4BIT);
2116 MVSATA_WDC_WRITE_1(mvport, SRB_H, WDSD_IBM);
2156 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_4BIT);
2166 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_4BIT);
2205 struct mvsata_port *mvport = (struct mvsata_port *)chp;
2239 MVSATA_WDC_WRITE_1(mvport, SRB_H, WDSD_IBM);
2275 len = MVSATA_WDC_READ_1(mvport, SRB_LBAM) +
2276 256 * MVSATA_WDC_READ_1(mvport, SRB_LBAH);
2277 ire = MVSATA_WDC_READ_1(mvport, SRB_SC);
2289 error = mvsata_bdma_init(mvport, xfer);
2311 mvsata_bdma_start(mvport);
2346 MVSATA_WDC_WRITE_2(mvport, SRB_PIOD, 0);
2403 MVSATA_WDC_READ_1(mvport, SRB_FE),
2404 MVSATA_WDC_READ_1(mvport, SRB_CS)
2437 struct mvsata_port *mvport = (struct mvsata_port *)chp;
2456 aprint_error_dev(MVSATA_DEV2(mvport),
2471 struct mvsata_port *mvport = (struct mvsata_port *)chp;
2479 mvsata_pmp_select(mvport, xfer->c_drive);
2638 mvsata_edma_enqueue(struct mvsata_port *mvport, struct ata_xfer *xfer)
2640 struct mvsata_softc *sc = device_private(MVSATA_DEV2(mvport));
2651 device_xname(MVSATA_DEV2(mvport)), mvport->port_hc->hc,
2652 mvport->port, ata_bio->blkno, ata_bio->nbytes, ata_bio->flags));
2654 reg = MVSATA_EDMA_READ_4(mvport, EDMA_REQQOP);
2656 reg = MVSATA_EDMA_READ_4(mvport, EDMA_REQQIP);
2667 rv = mvsata_dma_bufload(mvport, xfer->c_slot, databuf, ata_bio->nbytes,
2673 data_dmamap = mvport->port_reqtbl[xfer->c_slot].data_dmamap;
2674 eprd = mvport->port_reqtbl[xfer->c_slot].eprd;
2688 mvsata_print_eprd(mvport, xfer->c_slot);
2690 bus_dmamap_sync(mvport->port_dmat, mvport->port_eprd_dmamap,
2691 mvport->port_reqtbl[xfer->c_slot].eprd_offset, MVSATA_EPRD_MAX_SIZE,
2695 sc->sc_edma_setup_crqb(mvport, erqqip, xfer);
2698 mvsata_print_crqb(mvport, erqqip);
2700 bus_dmamap_sync(mvport->port_dmat, mvport->port_crqb_dmamap,
2706 crqb_base_addr = mvport->port_crqb_dmamap->dm_segs[0].ds_addr &
2708 MVSATA_EDMA_WRITE_4(mvport, EDMA_REQQBAH, (crqb_base_addr >> 16) >> 16);
2709 MVSATA_EDMA_WRITE_4(mvport, EDMA_REQQIP,
2716 mvsata_edma_handle(struct mvsata_port *mvport, struct ata_xfer *xfer1)
2718 struct ata_channel *chp = &mvport->port_ata_channel;
2727 reg = MVSATA_EDMA_READ_4(mvport, EDMA_REQQOP);
2729 if (mvport->port_prev_erqqop != erqqop) {
2732 if (mvport->port_prev_erqqop < erqqop)
2733 n = erqqop - mvport->port_prev_erqqop;
2736 bus_dmamap_sync(mvport->port_dmat,
2737 mvport->port_crqb_dmamap, 0, erqqop * s,
2739 n = MVSATA_EDMAQ_LEN - mvport->port_prev_erqqop;
2742 bus_dmamap_sync(mvport->port_dmat,
2743 mvport->port_crqb_dmamap,
2744 mvport->port_prev_erqqop * s, n * s,
2746 mvport->port_prev_erqqop = erqqop;
2749 reg = MVSATA_EDMA_READ_4(mvport, EDMA_RESQIP);
2751 reg = MVSATA_EDMA_READ_4(mvport, EDMA_RESQOP);
2756 device_xname(MVSATA_DEV2(mvport)), mvport->port_hc->hc,
2757 mvport->port, erpqip, erpqop));
2766 bus_dmamap_sync(mvport->port_dmat,
2767 mvport->port_crpb_dmamap,
2773 bus_dmamap_sync(mvport->port_dmat, mvport->port_crpb_dmamap,
2783 mvsata_print_crpb(mvport, erpqop);
2785 crpb = mvport->port_crpb + erpqop;
2797 bus_dmamap_sync(mvport->port_dmat, mvport->port_eprd_dmamap,
2798 mvport->port_reqtbl[xfer->c_slot].eprd_offset,
2809 mvsata_dma_bufunload(mvport, quetag, ata_bio->flags);
2825 bus_dmamap_sync(mvport->port_dmat,
2826 mvport->port_crpb_dmamap, 0,
2831 bus_dmamap_sync(mvport->port_dmat, mvport->port_crpb_dmamap,
2837 MVSATA_EDMA_WRITE_4(mvport, EDMA_RESQOP, reg);
2843 mvsata_edma_wait(struct mvsata_port *mvport, struct ata_xfer *xfer, int timeout)
2848 if (mvsata_edma_handle(mvport, xfer))
2854 mvsata_edma_rqq_remove(mvport, xfer);
2860 mvsata_edma_rqq_remove(struct mvsata_port *mvport, struct ata_xfer *xfer)
2862 struct ata_channel *chp = &mvport->port_ata_channel;
2863 struct mvsata_softc *sc = device_private(MVSATA_DEV2(mvport));
2868 mvsata_hreset_port(mvport);
2871 mvsata_edma_handle(mvport, NULL);
2873 bus_dmamap_sync(mvport->port_dmat, mvport->port_crqb_dmamap, 0,
2886 bus_dmamap_sync(mvport->port_dmat,
2887 mvport->port_eprd_dmamap,
2888 mvport->port_reqtbl[i].eprd_offset,
2890 mvsata_dma_bufunload(mvport, i, xfer->c_bio.flags);
2896 sc->sc_edma_setup_crqb(mvport, erqqip, rqxfer);
2899 bus_dmamap_sync(mvport->port_dmat, mvport->port_crqb_dmamap, 0,
2903 mvsata_edma_config(mvport, mvport->port_edmamode_curr);
2904 mvsata_edma_reset_qptr(mvport);
2905 mvsata_edma_enable(mvport);
2907 crqb_base_addr = mvport->port_crqb_dmamap->dm_segs[0].ds_addr &
2909 MVSATA_EDMA_WRITE_4(mvport, EDMA_REQQBAH, (crqb_base_addr >> 16) >> 16);
2910 MVSATA_EDMA_WRITE_4(mvport, EDMA_REQQIP,
2916 mvsata_bdma_init(struct mvsata_port *mvport, struct ata_xfer *xfer)
2927 device_xname(MVSATA_DEV2(mvport)), mvport->port_hc->hc,
2928 mvport->port, sc_xfer->datalen, sc_xfer->xs_control));
2930 rv = mvsata_dma_bufload(mvport, xfer->c_slot, databuf,
2937 data_dmamap = mvport->port_reqtbl[xfer->c_slot].data_dmamap;
2938 eprd = mvport->port_reqtbl[xfer->c_slot].eprd;
2952 mvsata_print_eprd(mvport, xfer->c_slot);
2954 bus_dmamap_sync(mvport->port_dmat, mvport->port_eprd_dmamap,
2955 mvport->port_reqtbl[xfer->c_slot].eprd_offset,
2957 eprd_addr = mvport->port_eprd_dmamap->dm_segs[0].ds_addr +
2958 mvport->port_reqtbl[xfer->c_slot].eprd_offset;
2960 MVSATA_EDMA_WRITE_4(mvport, DMA_DTLBA, eprd_addr & DMA_DTLBA_MASK);
2961 MVSATA_EDMA_WRITE_4(mvport, DMA_DTHBA, (eprd_addr >> 16) >> 16);
2964 MVSATA_EDMA_WRITE_4(mvport, DMA_C, DMA_C_READ);
2966 MVSATA_EDMA_WRITE_4(mvport, DMA_C, 0);
2972 mvsata_bdma_start(struct mvsata_port *mvport)
2977 mvsata_print_eprd(mvport, 0);
2980 MVSATA_EDMA_WRITE_4(mvport, DMA_C,
2981 MVSATA_EDMA_READ_4(mvport, DMA_C) | DMA_C_START);
2991 struct mvsata_port *mvport;
2998 mvport = malloc(sizeof(struct mvsata_port), M_DEVBUF,
3000 mvport->port = port;
3001 mvport->port_hc = mvhc;
3002 mvport->port_edmamode_negotiated = nodma;
3006 EDMA_REGISTERS_SIZE, &mvport->port_ioh);
3012 mvport->port_iot = mvhc->hc_iot;
3013 rv = bus_space_subregion(mvport->port_iot, mvport->port_ioh, SATA_SS, 4,
3014 &mvport->port_sata_sstatus);
3020 rv = bus_space_subregion(mvport->port_iot, mvport->port_ioh, SATA_SE, 4,
3021 &mvport->port_sata_serror);
3029 SATAHC_I_R02(port), 4, &mvport->port_sata_scontrol);
3031 rv = bus_space_subregion(mvport->port_iot, mvport->port_ioh,
3032 SATA_SC, 4, &mvport->port_sata_scontrol);
3038 mvport->port_dmat = sc->sc_dmat;
3039 mvhc->hc_ports[port] = mvport;
3042 chp = &mvport->port_ata_channel;
3048 rv = mvsata_wdc_reg_init(mvport, sc->sc_wdcdev.regs + channel);
3052 rv = bus_dmamap_create(mvport->port_dmat, crqbq_size, 1, crqbq_size, 0,
3053 BUS_DMA_NOWAIT, &mvport->port_crqb_dmamap);
3060 rv = bus_dmamap_create(mvport->port_dmat, crpbq_size, 1, crpbq_size, 0,
3061 BUS_DMA_NOWAIT, &mvport->port_crpb_dmamap);
3068 rv = bus_dmamap_create(mvport->port_dmat, eprd_buf_size, 1,
3069 eprd_buf_size, 0, BUS_DMA_NOWAIT, &mvport->port_eprd_dmamap);
3077 rv = bus_dmamap_create(mvport->port_dmat, MAXPHYS,
3079 &mvport->port_reqtbl[i].data_dmamap);
3093 bus_dmamap_destroy(mvport->port_dmat,
3094 mvport->port_reqtbl[i].data_dmamap);
3095 bus_dmamap_destroy(mvport->port_dmat, mvport->port_eprd_dmamap);
3097 bus_dmamap_destroy(mvport->port_dmat, mvport->port_crpb_dmamap);
3099 bus_dmamap_destroy(mvport->port_dmat, mvport->port_crqb_dmamap);
3105 mvsata_wdc_reg_init(struct mvsata_port *mvport, struct wdc_regs *wdr)
3109 hc = mvport->port_hc->hc;
3110 port = mvport->port;
3113 rv = bus_space_subregion(mvport->port_iot, mvport->port_ioh,
3117 device_xname(MVSATA_DEV2(mvport)), hc, port);
3120 wdr->cmd_iot = mvport->port_iot;
3128 device_xname(MVSATA_DEV2(mvport)), hc, port);
3137 device_xname(MVSATA_DEV2(mvport)), hc, port);
3140 wdr->ctl_iot = mvport->port_iot;
3144 rv = bus_space_subregion(mvport->port_iot, mvport->port_ioh,
3148 device_xname(MVSATA_DEV2(mvport)), hc, port);
3151 wdr->sata_iot = mvport->port_iot;
3152 rv = bus_space_subregion(mvport->port_iot, mvport->port_ioh,
3156 device_xname(MVSATA_DEV2(mvport)), hc, port);
3159 rv = bus_space_subregion(mvport->port_iot, mvport->port_ioh,
3163 device_xname(MVSATA_DEV2(mvport)), hc, port);
3166 rv = bus_space_subregion(mvport->port_iot, mvport->port_ioh,
3170 device_xname(MVSATA_DEV2(mvport)), hc, port);
3180 mvsata_edma_resource_prepare(struct mvsata_port *mvport, bus_dma_tag_t dmat,
3191 device_xname(MVSATA_DEV2(mvport)),
3192 mvport->port_hc->hc, mvport->port, rv);
3199 device_xname(MVSATA_DEV2(mvport)),
3200 mvport->port_hc->hc, mvport->port, rv);
3208 device_xname(MVSATA_DEV2(mvport)),
3209 mvport->port_hc->hc, mvport->port, rv);
3228 mvsata_edma_resource_purge(struct mvsata_port *mvport, bus_dma_tag_t dmat,
3238 mvsata_dma_bufload(struct mvsata_port *mvport, int index, void *databuf,
3242 bus_dmamap_t data_dmamap = mvport->port_reqtbl[index].data_dmamap;
3247 rv = bus_dmamap_load(mvport->port_dmat, data_dmamap, databuf, datalen,
3251 device_xname(MVSATA_DEV2(mvport)), mvport->port_hc->hc,
3252 mvport->port, rv);
3255 bus_dmamap_sync(mvport->port_dmat, data_dmamap, 0,
3262 mvsata_dma_bufunload(struct mvsata_port *mvport, int index, int flags)
3264 bus_dmamap_t data_dmamap = mvport->port_reqtbl[index].data_dmamap;
3266 bus_dmamap_sync(mvport->port_dmat, data_dmamap, 0,
3269 bus_dmamap_unload(mvport->port_dmat, data_dmamap);
3274 mvsata_hreset_port(struct mvsata_port *mvport)
3276 struct mvsata_softc *sc = device_private(MVSATA_DEV2(mvport));
3278 MVSATA_EDMA_WRITE_4(mvport, EDMA_CMD, EDMA_CMD_EATARST);
3282 MVSATA_EDMA_WRITE_4(mvport, EDMA_CMD, 0);
3284 mvport->_fix_phy_param._fix_phy(mvport);
3291 mvsata_reset_port(struct mvsata_port *mvport)
3293 device_t parent = device_parent(MVSATA_DEV2(mvport));
3295 MVSATA_EDMA_WRITE_4(mvport, EDMA_CMD, EDMA_CMD_EDSEDMA);
3297 mvsata_hreset_port(mvport);
3300 MVSATA_EDMA_WRITE_4(mvport, EDMA_CFG,
3303 MVSATA_EDMA_WRITE_4(mvport, EDMA_CFG,
3305 MVSATA_EDMA_WRITE_4(mvport, EDMA_T, 0);
3306 MVSATA_EDMA_WRITE_4(mvport, SATA_SEIM, 0x019c0000);
3307 MVSATA_EDMA_WRITE_4(mvport, SATA_SE, ~0);
3308 MVSATA_EDMA_WRITE_4(mvport, SATA_FISIC, 0);
3309 MVSATA_EDMA_WRITE_4(mvport, EDMA_IEC, 0);
3310 MVSATA_EDMA_WRITE_4(mvport, EDMA_IEM, 0);
3311 MVSATA_EDMA_WRITE_4(mvport, EDMA_REQQBAH, 0);
3312 MVSATA_EDMA_WRITE_4(mvport, EDMA_REQQIP, 0);
3313 MVSATA_EDMA_WRITE_4(mvport, EDMA_REQQOP, 0);
3314 MVSATA_EDMA_WRITE_4(mvport, EDMA_RESQBAH, 0);
3315 MVSATA_EDMA_WRITE_4(mvport, EDMA_RESQIP, 0);
3316 MVSATA_EDMA_WRITE_4(mvport, EDMA_RESQOP, 0);
3317 MVSATA_EDMA_WRITE_4(mvport, EDMA_CMD, 0);
3318 MVSATA_EDMA_WRITE_4(mvport, EDMA_TC, 0);
3319 MVSATA_EDMA_WRITE_4(mvport, EDMA_IORT, 0xbc);
3348 mvsata_softreset(struct mvsata_port *mvport, int flags)
3350 struct ata_channel *chp = &mvport->port_ata_channel;
3357 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_RST | WDCTL_IDS | WDCTL_4BIT);
3359 (void) MVSATA_WDC_READ_1(mvport, SRB_FE);
3360 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_IDS | WDCTL_4BIT);
3365 st0 = MVSATA_WDC_READ_1(mvport, SRB_CS);
3368 sig0 = MVSATA_WDC_READ_1(mvport, SRB_SC) << 0;
3369 sig0 |= MVSATA_WDC_READ_1(mvport, SRB_LBAL) << 8;
3370 sig0 |= MVSATA_WDC_READ_1(mvport, SRB_LBAM) << 16;
3371 sig0 |= MVSATA_WDC_READ_1(mvport, SRB_LBAH) << 24;
3378 device_xname(MVSATA_DEV2(mvport)),
3379 mvport->port_hc->hc, mvport->port, __func__);
3382 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_4BIT);
3388 mvsata_edma_reset_qptr(struct mvsata_port *mvport)
3391 mvport->port_crpb_dmamap->dm_segs[0].ds_addr;
3395 MVSATA_EDMA_WRITE_4(mvport, EDMA_REQQBAH, 0);
3396 MVSATA_EDMA_WRITE_4(mvport, EDMA_REQQIP, 0);
3397 MVSATA_EDMA_WRITE_4(mvport, EDMA_REQQOP, 0);
3398 MVSATA_EDMA_WRITE_4(mvport, EDMA_RESQBAH, (crpb_addr >> 16) >> 16);
3399 MVSATA_EDMA_WRITE_4(mvport, EDMA_RESQIP, 0);
3400 MVSATA_EDMA_WRITE_4(mvport, EDMA_RESQOP, (crpb_addr & crpb_addr_mask));
3404 mvsata_edma_enable(struct mvsata_port *mvport)
3407 MVSATA_EDMA_WRITE_4(mvport, EDMA_CMD, EDMA_CMD_EENEDMA);
3411 mvsata_edma_disable(struct mvsata_port *mvport, int timeout, int wflags)
3413 struct ata_channel *chp = &mvport->port_ata_channel;
3420 MVSATA_EDMA_WRITE_4(mvport, EDMA_CMD, EDMA_CMD_EDSEDMA);
3425 command = MVSATA_EDMA_READ_4(mvport, EDMA_CMD);
3434 device_xname(MVSATA_DEV2(mvport)),
3435 mvport->port_hc->hc, mvport->port);
3443 mvsata_edma_config(struct mvsata_port *mvport, enum mvsata_edmamode mode)
3445 struct mvsata_softc *sc = device_private(MVSATA_DEV2(mvport));
3448 reg = MVSATA_EDMA_READ_4(mvport, EDMA_CFG);
3453 aprint_error_dev(MVSATA_DEV2(mvport),
3484 MVSATA_EDMA_WRITE_4(mvport, EDMA_CFG, reg);
3514 MVSATA_EDMA_WRITE_4(mvport, EDMA_IEM, reg);
3515 reg = MVSATA_EDMA_READ_4(mvport, EDMA_HC);
3519 MVSATA_EDMA_WRITE_4(mvport, EDMA_HC, reg);
3526 reg = MVSATA_EDMA_READ_4(mvport, SATA_FISC);
3529 MVSATA_EDMA_WRITE_4(mvport, SATA_FISC, reg);
3532 mvport->port_edmamode_curr = mode;
3541 mvsata_edma_setup_crqb(struct mvsata_port *mvport, int erqqip,
3552 eprd_addr = mvport->port_eprd_dmamap->dm_segs[0].ds_addr +
3553 mvport->port_reqtbl[xfer->c_slot].eprd_offset;
3568 crqb = &mvport->port_crqb->crqb + erqqip;
3575 if (mvport->port_edmamode_curr == dma) {
3621 mvsata_read_preamps_gen1(struct mvsata_port *mvport)
3623 struct mvsata_hc *hc = mvport->port_hc;
3626 reg = MVSATA_HC_READ_4(hc, SATAHC_I_PHYMODE(mvport->port));
3635 mvsata_fix_phy_gen1(struct mvsata_port *mvport)
3637 struct mvsata_softc *sc = device_private(MVSATA_DEV2(mvport));
3638 struct mvsata_hc *mvhc = mvport->port_hc;
3640 int port = mvport->port, fix_apm_sq = 0;
3672 reg |= mvport->_fix_phy_param.pre_amps;
3677 mvsata_devconn_gen1(struct mvsata_port *mvport)
3679 struct mvsata_softc *sc = device_private(MVSATA_DEV2(mvport));
3682 mvport->_fix_phy_param._fix_phy(mvport);
3691 mvsata_read_preamps_gen2(struct mvsata_port *mvport)
3695 reg = MVSATA_EDMA_READ_4(mvport, SATA_PHYM2);
3704 mvsata_fix_phy_gen2(struct mvsata_port *mvport)
3706 struct mvsata_softc *sc = device_private(MVSATA_DEV2(mvport));
3718 reg = MVSATA_EDMA_READ_4(mvport, SATA_PHYM2);
3721 MVSATA_EDMA_WRITE_4(mvport, SATA_PHYM2, reg);
3725 reg = MVSATA_EDMA_READ_4(mvport, SATA_PHYM2);
3727 MVSATA_EDMA_WRITE_4(mvport, SATA_PHYM2, reg);
3733 reg = MVSATA_EDMA_READ_4(mvport, SATA_PHYM3);
3741 MVSATA_EDMA_WRITE_4(mvport, SATA_PHYM3, reg);
3755 tmp = MVSATA_EDMA_READ_4(mvport, SATA_PHYM3);
3757 reg = MVSATA_EDMA_READ_4(mvport, SATA_PHYM4);
3765 MVSATA_EDMA_WRITE_4(mvport, SATA_PHYM4, reg);
3769 MVSATA_EDMA_WRITE_4(mvport, SATA_PHYM3, tmp);
3773 reg = MVSATA_EDMA_READ_4(mvport, SATA_PHYM2);
3775 reg |= mvport->_fix_phy_param.pre_amps;
3785 MVSATA_EDMA_WRITE_4(mvport, SATA_PHYM2, reg);
3790 mvsata_edma_setup_crqb_gen2e(struct mvsata_port *mvport, int erqqip,
3798 eprd_addr = mvport->port_eprd_dmamap->dm_segs[0].ds_addr +
3799 mvport->port_reqtbl[xfer->c_slot].eprd_offset;
3805 crqb = &mvport->port_crqb->crqb_gen2e + erqqip;
3835 mvsata_print_crqb(struct mvsata_port *mvport, int n)
3839 n, (u_char *)(mvport->port_crqb + n));
3843 mvsata_print_crpb(struct mvsata_port *mvport, int n)
3847 n, (u_char *)(mvport->port_crpb + n));
3851 mvsata_print_eprd(struct mvsata_port *mvport, int n)
3856 eprd = mvport->port_reqtbl[n].eprd;