dev/cardbus/cardbus.c

155 	cardbus_chipset_tag_t cc = ca->ca_ct->ct_cc;
178 			u_int32_t e = (*cf->cardbus_conf_read)(cc, tag, i);
212 		cardbus_conf_write(cc, cf, tag, reg, 0);
230 			exrom = cardbus_conf_read(cc, cf, tag, reg);
231 			cardbus_conf_write(cc, cf, tag, reg, exrom | 1);
233 			command = cardbus_conf_read(cc, cf, tag,
235 			cardbus_conf_write(cc, cf, tag,
257 			exrom = cardbus_conf_read(cc, cf, tag, reg);
258 			cardbus_conf_write(cc, cf, tag, reg, exrom & ~1);
261 			command = cardbus_conf_read(cc, cf, tag,
263 			cardbus_conf_write(cc, cf, tag,
290 		command = cardbus_conf_read(cc, cf, tag,
292 		cardbus_conf_write(cc, cf, tag, PCI_COMMAND_STATUS_REG,
294 		cardbus_conf_write(cc, cf, tag, reg, 0);
410 	cardbus_chipset_tag_t cc;
417 	cc = sc->sc_cc;
424 	if ((cdstatus = (*cf->cardbus_ctrl)(cc, CARDBUS_CD)) == 0) {
440 	cardbus_chipset_tag_t cc;
450 	cc = sc->sc_cc;
454 	if ((cdstatus = (*cf->cardbus_ctrl)(cc, CARDBUS_CD)) == 0) {
467 	tag = cardbus_make_tag(cc, cf, sc->sc_bus, function);
479 			id = cardbus_conf_read(cc, cf, tag, PCI_ID_REG);
498 	bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG);
514 		tag = cardbus_make_tag(cc, cf, sc->sc_bus, function);
516 		id = cardbus_conf_read(cc, cf, tag, PCI_ID_REG);
517 		class = cardbus_conf_read(cc, cf, tag, PCI_CLASS_REG);
518 		cis_ptr = cardbus_conf_read(cc, cf, tag, CARDBUS_CIS_REG);
532 		cardbus_conf_write(cc, cf, tag, PCI_BAR0, 0);
533 		cardbus_conf_write(cc, cf, tag, PCI_BAR1, 0);
534 		cardbus_conf_write(cc, cf, tag, PCI_BAR2, 0);
535 		cardbus_conf_write(cc, cf, tag, PCI_BAR3, 0);
536 		cardbus_conf_write(cc, cf, tag, PCI_BAR4, 0);
537 		cardbus_conf_write(cc, cf, tag, PCI_BAR5, 0);
538 		cardbus_conf_write(cc, cf, tag, CARDBUS_ROM_REG, 0);
541 		bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG);
542 		icr = cardbus_conf_read(cc, cf, tag, PCI_INTERRUPT_REG);
571 		cardbus_conf_write(cc, cf, tag, PCI_BHLC_REG, bhlc);
572 		bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG);
732  * void *cardbus_intr_establish(cc, cf, irq, level, func, arg)
735  *   cardbus_chipset_tag_t *cc
739 cardbus_intr_establish(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf,
744 	return ((*cf->cardbus_intr_establish)(cc, level, func, arg));
754  * void cardbus_intr_disestablish(cc, cf, handler)
757  *   cardbus_chipset_tag_t *cc
760 cardbus_intr_disestablish(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf,
765 	(*cf->cardbus_intr_disestablish)(cc, handler);
827 	cardbus_chipset_tag_t cc = sc->sc_cc;
842 	tag = cardbus_make_tag(cc, cf, sc->sc_bus, func);
844 	command = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG);
848 	cardbus_conf_write(cc, cf, tag, PCI_COMMAND_STATUS_REG, command);
876  * int cardbus_get_capability(cardbus_chipset_tag_t cc,
883 cardbus_get_capability(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf,
889 	reg = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG);
893 	ofs = PCI_CAPLIST_PTR(cardbus_conf_read(cc, cf, tag,
900 		reg = cardbus_conf_read(cc, cf, tag, ofs);
977 	cardbus_chipset_tag_t cc = ct->ct_cc;
980 	value = cardbus_conf_read(cc, cf, tag, offset + PCI_PMCSR);
997 	cardbus_chipset_tag_t cc = ct->ct_cc;
1002 	if (!cardbus_get_capability(cc, cf, tag, PCI_CAP_PWRMGMT, &offset, &value))
1012 	cardbus_chipset_tag_t cc = ct->ct_cc;
1020 	value = cardbus_conf_read(cc, cf, tag, offset + PCI_PMCSR);
1055 	cardbus_conf_write(cc, cf, tag, offset + PCI_PMCSR, value);
1067 	cardbus_chipset_tag_t cc = ct->ct_cc;
1072 	if (!cardbus_get_capability(cc, cf, tag, PCI_CAP_PWRMGMT, &offset,
1139 cardbus_conf_capture(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf,
1145 		pcs->reg[off] = cardbus_conf_read(cc, cf, tag, (off * 4));
1149 cardbus_conf_restore(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf,
1156 		val = cardbus_conf_read(cc, cf, tag, (off * 4));
1158 			cardbus_conf_write(cc, cf,tag, (off * 4), pcs->reg[off]);