Lines Matching refs:ETH_RSR
205 u = CEMAC_READ(ETH_RSR);
206 CEMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));
295 rsr = CEMAC_READ(ETH_RSR); // get receive status register
301 CEMAC_WRITE(ETH_RSR, ETH_RSR_BNA); // clear interrupt
304 CEMAC_WRITE(ETH_RSR, ETH_RSR_BNA); // clear BNA bit
311 CEMAC_WRITE(ETH_RSR, ETH_RSR_OVR); // clear interrupt
435 u = CEMAC_READ(ETH_RSR);
436 CEMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));
954 u = CEMAC_READ(ETH_RSR);
955 CEMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));