arch/aarch64/linux32_machdep.c

67 	luc->luc_mcontext.arm_r0 = gr[_REG_R0];
68 	luc->luc_mcontext.arm_r1 = gr[_REG_R1];
69 	luc->luc_mcontext.arm_r2 = gr[_REG_R2];
70 	luc->luc_mcontext.arm_r3 = gr[_REG_R3];
71 	luc->luc_mcontext.arm_r4 = gr[_REG_R4];
72 	luc->luc_mcontext.arm_r5 = gr[_REG_R5];
73 	luc->luc_mcontext.arm_r6 = gr[_REG_R6];
74 	luc->luc_mcontext.arm_r7 = gr[_REG_R7];
75 	luc->luc_mcontext.arm_r8 = gr[_REG_R8];
76 	luc->luc_mcontext.arm_r9 = gr[_REG_R9];
77 	luc->luc_mcontext.arm_r10 = gr[_REG_R10];
78 	luc->luc_mcontext.arm_fp = gr[_REG_R11];
79 	luc->luc_mcontext.arm_ip = gr[_REG_R12];
80 	luc->luc_mcontext.arm_sp = gr[_REG_R13];
81 	luc->luc_mcontext.arm_lr = gr[_REG_R14];
82 	luc->luc_mcontext.arm_pc = gr[_REG_R15];
83 	luc->luc_mcontext.arm_cpsr = gr[_REG_CPSR];
84 	luc->luc_mcontext.trap_no = 0;
85 	luc->luc_mcontext.error_code = 0;
86 	luc->luc_mcontext.oldmask = 0;
87 	luc->luc_mcontext.fault_address = 0;
132 	gr[_REG_R0] = luc->luc_mcontext.arm_r0;
133 	gr[_REG_R1] = luc->luc_mcontext.arm_r1;
134 	gr[_REG_R2] = luc->luc_mcontext.arm_r2;
135 	gr[_REG_R3] = luc->luc_mcontext.arm_r3;
136 	gr[_REG_R4] = luc->luc_mcontext.arm_r4;
137 	gr[_REG_R5] = luc->luc_mcontext.arm_r5;
138 	gr[_REG_R6] = luc->luc_mcontext.arm_r6;
139 	gr[_REG_R7] = luc->luc_mcontext.arm_r7;
140 	gr[_REG_R8] = luc->luc_mcontext.arm_r8;
141 	gr[_REG_R9] = luc->luc_mcontext.arm_r9;
142 	gr[_REG_R10] = luc->luc_mcontext.arm_r10;
143 	gr[_REG_R11] = luc->luc_mcontext.arm_fp;
144 	gr[_REG_R12] = luc->luc_mcontext.arm_ip;
145 	gr[_REG_R13] = luc->luc_mcontext.arm_sp;
146 	gr[_REG_R14] = luc->luc_mcontext.arm_lr;
147 	gr[_REG_R15] = luc->luc_mcontext.arm_pc;
148 	gr[_REG_CPSR] = luc->luc_mcontext.arm_cpsr;