sun3/dev/si_sebuf.c

97 	struct ncr5380_softc	ncr_sc;
167 	struct ncr5380_softc *ncr_sc = &sc->ncr_sc;
173 	ncr_sc->sc_dev = self;
190 	ncr_sc->sc_pio_out = ncr5380_pio_out;
191 	ncr_sc->sc_pio_in =  ncr5380_pio_in;
194 	ncr_sc->sc_dma_alloc = se_dma_alloc;
195 	ncr_sc->sc_dma_free  = se_dma_free;
196 	ncr_sc->sc_dma_setup = se_dma_setup;
197 	ncr_sc->sc_dma_start = se_dma_start;
198 	ncr_sc->sc_dma_poll  = se_dma_poll;
199 	ncr_sc->sc_dma_eop   = se_dma_eop;
200 	ncr_sc->sc_dma_stop  = se_dma_stop;
201 	ncr_sc->sc_intr_on   = se_intr_on;
202 	ncr_sc->sc_intr_off  = se_intr_off;
210 	se_reset(ncr_sc);
219 	ncr_sc->sc_no_disconnect =
221 	ncr_sc->sc_parity_disable =
224 		ncr_sc->sc_flags |= NCR5380_FORCE_POLLING;
230 		ncr_sc->sc_dma_alloc = NULL;
233 	ncr_sc->sc_min_dma_len = MIN_DMA_LEN;
238 	ncr_sc->sci_r0 = &regs->ncrregs[0];
239 	ncr_sc->sci_r1 = &regs->ncrregs[1];
240 	ncr_sc->sci_r2 = &regs->ncrregs[2];
241 	ncr_sc->sci_r3 = &regs->ncrregs[3];
242 	ncr_sc->sci_r4 = &regs->ncrregs[4];
243 	ncr_sc->sci_r5 = &regs->ncrregs[5];
244 	ncr_sc->sci_r6 = &regs->ncrregs[6];
245 	ncr_sc->sci_r7 = &regs->ncrregs[7];
247 	ncr_sc->sc_rev = NCR_VARIANT_NCR5380;
257 	ncr_sc->sc_channel.chan_id = 7;
258 	ncr_sc->sc_adapter.adapt_minphys = se_minphys;
263 	ncr5380_attach(ncr_sc);
267 se_reset(struct ncr5380_softc *ncr_sc)
269 	struct se_softc *sc = (struct se_softc *)ncr_sc;
298 se_intr_on(struct ncr5380_softc *ncr_sc)
300 	struct se_softc *sc = (struct se_softc *)ncr_sc;
321 se_intr_off(struct ncr5380_softc *ncr_sc)
323 	struct se_softc *sc = (struct se_softc *)ncr_sc;
341 se_dma_setup(struct ncr5380_softc *ncr_sc)
343 	struct se_softc *sc = (struct se_softc *)ncr_sc;
344 	struct sci_req *sr = ncr_sc->sc_current;
355 	data_pa += (ncr_sc->sc_dataptr - dh->dh_addr);
358 	xlen = ncr_sc->sc_datalen;
387 se_dma_start(struct ncr5380_softc *ncr_sc)
389 	struct se_softc *sc = (struct se_softc *)ncr_sc;
390 	struct sci_req *sr = ncr_sc->sc_current;
407 		*ncr_sc->sci_tcmd = PHASE_DATA_OUT;
408 		SCI_CLR_INTR(ncr_sc);
409 		*ncr_sc->sci_icmd = SCI_ICMD_DATA;
410 		*ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE);
411 		*ncr_sc->sci_dma_send = 0;	/* start it */
413 		*ncr_sc->sci_tcmd = PHASE_DATA_IN;
414 		SCI_CLR_INTR(ncr_sc);
415 		*ncr_sc->sci_icmd = 0;
416 		*ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE);
417 		*ncr_sc->sci_irecv = 0;	/* start it */
424 	ncr_sc->sc_state |= NCR_DOINGDMA;
429 		    __func__, ncr_sc->sc_state);
436 se_dma_eop(struct ncr5380_softc *ncr_sc)
444 se_dma_stop(struct ncr5380_softc *ncr_sc)
446 	struct se_softc *sc = (struct se_softc *)ncr_sc;
447 	struct sci_req *sr = ncr_sc->sc_current;
452 	if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) {
458 	ncr_sc->sc_state &= ~NCR_DOINGDMA;
464 	*ncr_sc->sci_tcmd = PHASE_INVALID;
467 	if (ncr_sc->sc_state & NCR_ABORTING)
490 		ncr_sc->sc_state |= NCR_ABORTING;
493 	if (ntrans > ncr_sc->sc_datalen)
497 	ncr_sc->sc_dataptr += ntrans;
498 	ncr_sc->sc_datalen -= ntrans;
505 	*ncr_sc->sci_mode &= ~(SCI_MODE_DMA | SCI_MODE_DMA_IE);
506 	*ncr_sc->sci_icmd = 0;
537 		claimed = ncr5380_intr(&sc->ncr_sc);
561 se_dma_alloc(struct ncr5380_softc *ncr_sc)
563 	struct se_softc *sc = (struct se_softc *)ncr_sc;
564 	struct sci_req *sr = ncr_sc->sc_current;
575 	addr = (u_long)ncr_sc->sc_dataptr;
576 	xlen = ncr_sc->sc_datalen;
596 		ncr_sc->sc_datalen = xlen = MAX_DMA_LEN;
633 se_dma_free(struct ncr5380_softc *ncr_sc)
635 	struct sci_req *sr = ncr_sc->sc_current;
643 	if (ncr_sc->sc_state & NCR_DOINGDMA)
667 se_dma_poll(struct ncr5380_softc *ncr_sc)
669 	struct se_softc *sc = (struct se_softc *)ncr_sc;
670 	struct sci_req *sr = ncr_sc->sc_current;
675 	if (ncr_sc->sc_state & NCR_ABORTING)