Lines Matching refs:csr
398 u_short csr;
404 csr = SWREG_READ(ncr_sc, SWREG_CSR);
406 NCR_TRACE("sw_intr: csr=0x%x\n", csr);
408 if (csr & SW_CSR_DMA_CONFLICT) {
412 if (csr & SW_CSR_DMA_BUS_ERR) {
420 csr |= SW_CSR_DMA_IP;
423 if (csr & (SW_CSR_SBC_IP | SW_CSR_DMA_IP)) {
589 int tmo, csr_mask, csr;
600 csr = SWREG_READ(ncr_sc, SWREG_CSR);
601 if (csr & csr_mask)
615 printf("%s: done, csr=0x%x\n", __func__, csr);
633 uint32_t csr;
636 csr = SWREG_READ(ncr_sc, SWREG_CSR);
637 csr |= SW_CSR_DMA_EN; /* XXX - this bit is for vme only?! */
638 SWREG_WRITE(ncr_sc, SWREG_CSR, csr);
650 uint32_t csr;
652 csr = SWREG_READ(ncr_sc, SWREG_CSR);
653 csr &= ~SW_CSR_DMA_EN;
654 SWREG_WRITE(ncr_sc, SWREG_CSR, csr);
670 uint32_t csr;
675 csr = SWREG_READ(ncr_sc, SWREG_CSR);
676 csr &= ~SW_CSR_SEND;
677 SWREG_WRITE(ncr_sc, SWREG_CSR, csr);
693 uint32_t csr;
719 csr = SWREG_READ(ncr_sc, SWREG_CSR);
721 csr |= SW_CSR_SEND;
723 csr &= ~SW_CSR_SEND;
725 SWREG_WRITE(ncr_sc, SWREG_CSR, csr);
784 csr |= SW_CSR_DMA_EN;
785 SWREG_WRITE(ncr_sc, SWREG_CSR, csr);
826 uint32_t csr;
837 csr = SWREG_READ(ncr_sc, SWREG_CSR);
838 csr &= ~SW_CSR_DMA_EN;
839 SWREG_WRITE(ncr_sc, SWREG_CSR, csr);
854 if (csr & (SW_CSR_DMA_CONFLICT | SW_CSR_DMA_BUS_ERR))
856 if (csr & (SW_CSR_DMA_CONFLICT))
859 printf("sw: DMA error, csr=0x%x, reset\n", csr);