Lines Matching refs:VIA1
72 #define PM_SR() read_via_reg(VIA1, vSR)
73 #define PM_VIA_INTR_ENABLE() write_via_reg(VIA1, vIER, 0x90)
74 #define PM_VIA_INTR_DISABLE() write_via_reg(VIA1, vIER, 0x10)
75 #define PM_VIA_CLR_INTR() write_via_reg(VIA1, vIFR, 0x90)
405 via_reg_or(VIA1, vACR, 0x0c);
406 via_reg_and(VIA1, vACR, ~0x10);
425 via_reg_or(VIA1, vACR, 0x1c);
440 via_reg_or(VIA1, vACR, 0x1c);
441 write_via_reg(VIA1, vSR, data); /* PM_SR() = data; */
448 via_reg_or(VIA1, vACR, 0x1c);
459 via_reg_or(VIA1, vACR, 0x1c);
486 via1_vIER &= read_via_reg(VIA1, vIER);
487 write_via_reg(VIA1, vIER, via1_vIER);
558 write_via_reg(VIA1, vIER, via1_vIER);
577 PM_VIA_CLR_INTR(); /* clear VIA1 interrupt */
660 write_via_reg(VIA1, vIER, 0x10);
723 if (read_via_reg(VIA1, vIFR) & 0x14)