Lines Matching refs:VIA1
71 #define PM_SR() via_reg(VIA1, vSR)
72 #define PM_VIA_INTR_ENABLE() via_reg(VIA1, vIER) = 0x90
73 #define PM_VIA_INTR_DISABLE() via_reg(VIA1, vIER) = 0x10
74 #define PM_VIA_CLR_INTR() via_reg(VIA1, vIFR) = 0x90
414 via1_vIER = via_reg(VIA1, vIER);
417 via1_vDirA = via_reg(VIA1, vDirA);
428 via_reg(VIA1, vDirA) = via1_vDirA;
429 via_reg(VIA1, vIER) = via1_vIER;
450 via_reg(VIA1, vIER) = via1_vIER;
458 via1_vDirA = via_reg(VIA1, vDirA);
459 via_reg(VIA1, vDirA) &= 0x7f;
465 via_reg(VIA1, vDirA) = via1_vDirA;
473 via_reg(VIA1, vDirA) = via1_vDirA;
474 via_reg(VIA1, vIER) = via1_vIER;
529 via_reg(VIA1, vDirA) = via1_vDirA;
530 via_reg(VIA1, vIER) = via1_vIER;
550 PM_VIA_CLR_INTR(); /* clear VIA1 interrupt */
609 via_reg(VIA1, vACR) |= 0x0c;
610 via_reg(VIA1, vACR) &= ~0x10;
629 via_reg(VIA1, vACR) |= 0x1c;
644 via_reg(VIA1, vACR) |= 0x1c;
659 via_reg(VIA1, vACR) |= 0x1c;
686 via1_vIER &= via_reg(VIA1, vIER);
687 via_reg(VIA1, vIER) = via1_vIER;
793 via_reg(VIA1, vIER) = via1_vIER;
812 PM_VIA_CLR_INTR(); /* clear VIA1 interrupt */
978 via_reg(VIA1, vIER) = 0x10;
1051 if ((via_reg(VIA1, vIFR) & 0x10) == 0x10)