arm/ti/ti_edma.c

61 	uint8_t ch_index;
148 		ch->ch_index = idx;
307 		KASSERT(ch->ch_index == drq);
319 	if (ch->ch_index < 32) {
320 		EDMA_WRITE(sc, EDMA_ICR_REG, __BIT(ch->ch_index));
321 		EDMA_WRITE(sc, EDMA_IESR_REG, __BIT(ch->ch_index));
323 		EDMA_WRITE(sc, EDMA_ICRH_REG, __BIT(ch->ch_index - 32));
324 		EDMA_WRITE(sc, EDMA_IESRH_REG, __BIT(ch->ch_index - 32));
344 	if (ch->ch_index < 32) {
345 		EDMA_WRITE(sc, EDMA_IECR_REG, __BIT(ch->ch_index));
347 		EDMA_WRITE(sc, EDMA_IECRH_REG, __BIT(ch->ch_index - 32));
351 	edma_bit_clr(sc->sc_dmamask, ch->ch_index);
416 	DPRINTF(1, (sc->sc_dev, "write param entry ch# %d pe %d: 0x%08x -> 0x%08x (%u, %u, %u)\n", ch->ch_index, param_entry, ep->ep_src, ep->ep_dst, ep->ep_acnt, ep->ep_bcnt, ep->ep_ccnt));
430 	bus_size_t off = (ch->ch_index < 32 ? 0 : 4);
431 	uint32_t bit = __BIT(ch->ch_index < 32 ?
432 			     ch->ch_index : ch->ch_index - 32);
434 	DPRINTF(1, (sc->sc_dev, "enable transfer ch# %d off %d bit %x pe %d\n", ch->ch_index, (int)off, bit, param_entry));
436 	EDMA_WRITE(sc, EDMA_DCHMAP_REG(ch->ch_index),
456 	bus_size_t off = (ch->ch_index < 32 ? 0 : 4);
457 	uint32_t bit = __BIT(ch->ch_index < 32 ?
458 			     ch->ch_index : ch->ch_index - 32);
460 	DPRINTF(1, (sc->sc_dev, "start transfer ch# %d off %d bit %x pe %d\n", ch->ch_index, (int)off, bit));
474 	bus_size_t off = (ch->ch_index < 32 ? 0 : 4);
475 	uint32_t bit = __BIT(ch->ch_index < 32 ?
476 			     ch->ch_index : ch->ch_index - 32);
483 	EDMA_WRITE(sc, EDMA_DCHMAP_REG(ch->ch_index),
490 	return ch->ch_index;
523 	device_printf(sc->sc_dev, "DCHMAP%d: %08x\n", ch->ch_index,
524 	    EDMA_READ(sc, EDMA_DCHMAP_REG(ch->ch_index)));