Lines Matching refs:nkmp
140 const int cluster = clk->u.nkmp.reg == PLL_C0CPUX_CTRL_REG ? 0 : 1;
141 struct sunxi_ccu_nkmp *nkmp = &clk->u.nkmp;
157 val = CCU_READ(sc, nkmp->reg);
158 val &= ~nkmp->n;
159 val |= __SHIFTIN(n, nkmp->n);
160 CCU_WRITE(sc, nkmp->reg, val);
163 while ((CCU_READ(sc, PLL_STABLE_STATUS_REG) & nkmp->lock) == 0)
180 .u.nkmp.reg = PLL_C0CPUX_CTRL_REG,
181 .u.nkmp.parent = "hosc",
182 .u.nkmp.n = __BITS(15,8),
183 .u.nkmp.k = 0,
184 .u.nkmp.m = __BITS(1,0),
185 .u.nkmp.p = __BIT(16),
186 .u.nkmp.enable = __BIT(31),
187 .u.nkmp.flags = SUNXI_CCU_NKMP_SCALE_CLOCK |
190 .u.nkmp.lock = __BIT(1), /* PLL_STABLE_STATUS_REG */
191 .u.nkmp.table = NULL,
201 .u.nkmp.reg = PLL_C1CPUX_CTRL_REG,
202 .u.nkmp.parent = "hosc",
203 .u.nkmp.n = __BITS(15,8),
204 .u.nkmp.k = 0,
205 .u.nkmp.m = __BITS(1,0),
206 .u.nkmp.p = __BIT(16),
207 .u.nkmp.enable = __BIT(31),
208 .u.nkmp.flags = SUNXI_CCU_NKMP_SCALE_CLOCK |
211 .u.nkmp.lock = __BIT(1), /* PLL_STABLE_STATUS_REG */
212 .u.nkmp.table = NULL,