Lines Matching refs:its
89 gits_read_4(struct gicv3_its *its, bus_size_t reg)
91 return bus_space_read_4(its->its_bst, its->its_bsh, reg);
95 gits_write_4(struct gicv3_its *its, bus_size_t reg, uint32_t val)
97 bus_space_write_4(its->its_bst, its->its_bsh, reg, val);
101 gits_read_8(struct gicv3_its *its, bus_size_t reg)
103 return bus_space_read_8(its->its_bst, its->its_bsh, reg);
107 gits_write_8(struct gicv3_its *its, bus_size_t reg, uint64_t val)
109 bus_space_write_8(its->its_bst, its->its_bsh, reg, val);
113 gits_command(struct gicv3_its *its, const struct gicv3_its_command *cmd)
118 cwriter = gits_read_8(its, GITS_CWRITER);
121 uint64_t creadr = gits_read_8(its, GITS_CREADR);
123 KASSERT(((woff + sizeof(cmd->dw)) & (its->its_cmd.len - 1)) != (creadr & GITS_CREADR_Offset));
126 uint64_t *dw = (uint64_t *)(its->its_cmd.base + woff);
129 bus_dmamap_sync(its->its_dmat, its->its_cmd.map, woff, sizeof(cmd->dw), BUS_DMASYNC_PREWRITE);
132 if (woff == its->its_cmd.len)
135 gits_write_8(its, GITS_CWRITER, woff);
139 gits_command_mapc(struct gicv3_its *its, uint16_t icid, uint64_t rdbase, bool v)
156 gits_command(its, &cmd);
160 gits_command_mapd(struct gicv3_its *its, uint32_t deviceid, uint64_t itt_addr, u_int size, bool v)
167 * Map a device table entry (DeviceID) to its associated ITT (ITT_addr).
176 gits_command(its, &cmd);
180 gits_command_mapti(struct gicv3_its *its, uint32_t deviceid, uint32_t eventid, uint32_t pintid, uint16_t icid)
185 * Map the event defined by EventID and DeviceID to its associated ITE, defined by ICID and pINTID
193 gits_command(its, &cmd);
197 gits_command_movi(struct gicv3_its *its, uint32_t deviceid, uint32_t eventid, uint16_t icid)
210 gits_command(its, &cmd);
214 gits_command_inv(struct gicv3_its *its, uint32_t deviceid, uint32_t eventid)
226 gits_command(its, &cmd);
230 gits_command_invall(struct gicv3_its *its, uint16_t icid)
242 gits_command(its, &cmd);
246 gits_command_sync(struct gicv3_its *its, uint64_t rdbase)
261 gits_command(its, &cmd);
266 gits_command_int(struct gicv3_its *its, uint32_t deviceid, uint32_t eventid)
280 gits_command(its, &cmd);
285 gits_wait(struct gicv3_its *its)
295 woff = gits_read_8(its, GITS_CWRITER) & GITS_CWRITER_Offset;
296 roff = gits_read_8(its, GITS_CREADR) & GITS_CREADR_Offset;
302 device_printf(its->its_gic->sc_dev, "ITS command queue timeout\n");
310 gicv3_its_msi_alloc_lpi(struct gicv3_its *its,
316 KASSERT(its->its_gic->sc_lpi_pool != NULL);
318 if (vmem_alloc(its->its_gic->sc_lpi_pool, 1, VM_INSTANTFIT|VM_SLEEP, &n) != 0)
321 KASSERT(its->its_pa[n] == NULL);
325 its->its_pa[n] = new_pa;
326 return n + its->its_pic->pic_irqbase;
330 gicv3_its_msi_free_lpi(struct gicv3_its *its, int lpi)
334 KASSERT(its->its_gic->sc_lpi_pool != NULL);
335 KASSERT(lpi >= its->its_pic->pic_irqbase);
337 pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
338 its->its_pa[lpi - its->its_pic->pic_irqbase] = NULL;
341 vmem_free(its->its_gic->sc_lpi_pool, lpi - its->its_pic->pic_irqbase, 1);
358 gicv3_its_device_map(struct gicv3_its *its, uint32_t devid, u_int count)
367 const uint64_t typer = gits_read_8(its, GITS_TYPER);
371 LIST_FOREACH(dev, &its->its_devices, dev_list)
379 gicv3_dma_alloc(its->its_gic, &dev->dev_itt, itt_size, GITS_ITT_ALIGN);
380 LIST_INSERT_HEAD(&its->its_devices, dev, dev_list);
386 mutex_enter(its->its_lock);
387 gits_command_mapd(its, devid, dev->dev_itt.segs[0].ds_addr, id_bits - 1, true);
388 gits_wait(its);
389 mutex_exit(its->its_lock);
395 gicv3_its_msi_enable(struct gicv3_its *its, int lpi, int count)
397 const struct pci_attach_args *pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
411 const uint64_t addr = its->its_base + GITS_TRANSLATER;
419 lpi - its->its_pic->pic_irqbase);
425 lpi - its->its_pic->pic_irqbase);
432 gicv3_its_msi_disable(struct gicv3_its *its, int lpi)
434 const struct pci_attach_args *pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
449 gicv3_its_msix_enable(struct gicv3_its *its, int lpi, int msix_vec,
452 const struct pci_attach_args *pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
462 const uint64_t addr = its->its_base + GITS_TRANSLATER;
466 bus_space_write_4(bst, bsh, entry_base + PCI_MSIX_TABLE_ENTRY_DATA, lpi - its->its_pic->pic_irqbase);
477 gicv3_its_msix_disable(struct gicv3_its *its, int lpi)
479 const struct pci_attach_args *pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
497 struct gicv3_its * const its = msi->msi_priv;
505 const uint64_t typer = gits_read_8(its, GITS_TYPER);
512 if (gicv3_its_device_map(its, devid, *count) != 0)
516 mutex_enter(its->its_lock);
518 const int lpi = gicv3_its_msi_alloc_lpi(its, pa);
526 gicv3_its_msi_enable(its, lpi, *count);
531 its->its_devid[lpi - its->its_pic->pic_irqbase] = devid;
532 its->its_targets[lpi - its->its_pic->pic_irqbase] = ci;
537 gits_command_mapti(its, devid, lpi - its->its_pic->pic_irqbase, lpi, cpu_index(ci));
538 gits_command_sync(its, its->its_rdbase[cpu_index(ci)]);
540 gits_wait(its);
541 mutex_exit(its->its_lock);
550 struct gicv3_its * const its = msi->msi_priv;
563 const uint64_t typer = gits_read_8(its, GITS_TYPER);
583 if (gicv3_its_device_map(its, devid, *count) != 0) {
589 mutex_enter(its->its_lock);
591 const int lpi = gicv3_its_msi_alloc_lpi(its, pa);
599 gicv3_its_msix_enable(its, lpi, msix_vec, bst, bsh);
604 its->its_devid[lpi - its->its_pic->pic_irqbase] = devid;
605 its->its_targets[lpi - its->its_pic->pic_irqbase] = ci;
610 gits_command_mapti(its, devid, lpi - its->its_pic->pic_irqbase, lpi, cpu_index(ci));
611 gits_command_sync(its, its->its_rdbase[cpu_index(ci)]);
613 gits_wait(its);
614 mutex_exit(its->its_lock);
625 struct gicv3_its * const its = msi->msi_priv;
631 intrh = pic_establish_intr(its->its_pic, lpi - its->its_pic->pic_irqbase, ipl,
637 KASSERT(its->its_pa[lpi - its->its_pic->pic_irqbase] != NULL);
638 const uint32_t devid = its->its_devid[lpi - its->its_pic->pic_irqbase];
639 gits_command_inv(its, devid, lpi - its->its_pic->pic_irqbase);
648 struct gicv3_its * const its = msi->msi_priv;
653 KASSERT(lpi >= its->its_pic->pic_irqbase);
655 gicv3_its_msix_disable(its, lpi);
657 gicv3_its_msi_disable(its, lpi);
658 gicv3_its_msi_free_lpi(its, lpi);
659 its->its_targets[lpi - its->its_pic->pic_irqbase] = NULL;
660 its->its_devid[lpi - its->its_pic->pic_irqbase] = 0;
662 its->its_pic->pic_sources[lpi - its->its_pic->pic_irqbase];
669 gicv3_its_command_init(struct gicv3_softc *sc, struct gicv3_its *its)
673 gicv3_dma_alloc(sc, &its->its_cmd, GITS_COMMANDS_SIZE, GITS_COMMANDS_ALIGN);
675 KASSERT((gits_read_4(its, GITS_CTLR) & GITS_CTLR_Enabled) == 0);
676 KASSERT((gits_read_4(its, GITS_CTLR) & GITS_CTLR_Quiescent) != 0);
678 cbaser = its->its_cmd.segs[0].ds_addr;
681 cbaser |= __SHIFTIN((its->its_cmd.len / 4096) - 1, GITS_CBASER_Size);
684 gits_write_8(its, GITS_CWRITER, 0);
685 gits_write_8(its, GITS_CBASER, cbaser);
689 gicv3_its_table_params(struct gicv3_softc *sc, struct gicv3_its *its,
693 const uint64_t typer = gits_read_8(its, GITS_TYPER);
694 const uint32_t iidr = gits_read_4(its, GITS_IIDR);
710 gicv3_its_table_init(struct gicv3_softc *sc, struct gicv3_its *its)
718 gicv3_its_table_params(sc, its, &devbits, &innercache, &share);
721 baser = gits_read_8(its, GITS_BASERn(tab));
764 gicv3_dma_alloc(sc, &its->its_tab[tab], table_size, table_align);
769 baser |= its->its_tab[tab].segs[0].ds_addr;
776 gits_write_8(its, GITS_BASERn(tab), baser);
778 baser = gits_read_8(its, GITS_BASERn(tab));
783 gits_write_8(its, GITS_BASERn(tab), baser);
786 baser = gits_read_8(its, GITS_BASERn(tab));
788 tab, table_type, its->its_tab[tab].segs[0].ds_addr, table_size,
795 gicv3_its_enable(struct gicv3_softc *sc, struct gicv3_its *its)
799 ctlr = gits_read_4(its, GITS_CTLR);
801 gits_write_4(its, GITS_CTLR, ctlr);
807 struct gicv3_its * const its = priv;
808 struct gicv3_softc * const sc = its->its_gic;
812 const uint64_t typer = bus_space_read_8(sc->sc_bst, its->its_bsh, GITS_TYPER);
819 its->its_rdbase[cpu_index(ci)] = rdbase;
824 mutex_enter(its->its_lock);
825 gits_command_mapc(its, cpu_index(ci), rdbase, true);
826 gits_command_invall(its, cpu_index(ci));
827 gits_wait(its);
832 for (irq = 0; irq < its->its_pic->pic_maxsources; irq++) {
833 if (its->its_targets[irq] != ci)
835 KASSERT(its->its_pa[irq] != NULL);
837 const uint32_t devid = its->its_devid[irq];
838 gits_command_movi(its, devid, irq, cpu_index(ci));
839 gits_command_sync(its, its->its_rdbase[cpu_index(ci)]);
841 gits_wait(its);
842 mutex_exit(its->its_lock);
844 its->its_cpuonline[cpu_index(ci)] = true;
850 struct gicv3_its * const its = priv;
853 ci = its->its_targets[irq];
861 struct gicv3_its * const its = priv;
869 pa = its->its_pa[irq];
874 its->its_targets[irq] = ci;
876 if (its->its_cpuonline[cpu_index(ci)] == true) {
878 mutex_enter(its->its_lock);
879 gits_command_movi(its, devid, irq, cpu_index(ci));
880 gits_command_sync(its, its->its_rdbase[cpu_index(ci)]);
881 mutex_exit(its->its_lock);
891 struct gicv3_its *its;
898 its = kmem_zalloc(sizeof(*its), KM_SLEEP);
899 its->its_id = its_id;
900 its->its_bst = sc->sc_bst;
901 its->its_bsh = bsh;
902 its->its_dmat = sc->sc_dmat;
903 its->its_base = its_base;
904 its->its_pic = &sc->sc_lpi;
905 snprintf(its->its_pic->pic_name, sizeof(its->its_pic->pic_name), "gicv3-its");
906 KASSERT(its->its_pic->pic_maxsources > 0);
907 its->its_pa = kmem_zalloc(sizeof(struct pci_attach_args *) * its->its_pic->pic_maxsources, KM_SLEEP);
908 its->its_targets = kmem_zalloc(sizeof(struct cpu_info *) * its->its_pic->pic_maxsources, KM_SLEEP);
909 its->its_devid = kmem_zalloc(sizeof(uint32_t) * its->its_pic->pic_maxsources, KM_SLEEP);
910 its->its_gic = sc;
911 its->its_rdbase = kmem_zalloc(sizeof(*its->its_rdbase) * ncpu, KM_SLEEP);
912 its->its_cpuonline = kmem_zalloc(sizeof(*its->its_cpuonline) * ncpu, KM_SLEEP);
913 its->its_cb.cpu_init = gicv3_its_cpu_init;
914 its->its_cb.get_affinity = gicv3_its_get_affinity;
915 its->its_cb.set_affinity = gicv3_its_set_affinity;
916 its->its_cb.priv = its;
917 LIST_INIT(&its->its_devices);
918 LIST_INSERT_HEAD(&sc->sc_lpi_callbacks, &its->its_cb, list);
919 its->its_lock = mutex_obj_alloc(MUTEX_SPIN, IPL_NONE);
921 gicv3_its_command_init(sc, its);
922 gicv3_its_table_init(sc, its);
924 gicv3_its_enable(sc, its);
926 gicv3_its_cpu_init(its, curcpu());
928 msi = &its->its_msi;
931 msi->msi_priv = its;