sim/arm/thumbemu.c

36 #define tBIT(n)    ( (ARMword)(tinstr >> (n)) & 1)
37 #define tBITS(m,n) ( (ARMword)(tinstr << (31 - (n))) >> ((31 - (n)) + (m)) )
39 #define ntBIT(n)    ( (ARMword)(next_instr >> (n)) & 1)
40 #define ntBITS(m,n) ( (ARMword)(next_instr << (31 - (n))) >> ((31 - (n)) + (m)) )
68 static ARMword skipping_32bit_thumb = 0;
71 static ARMword IT_block_mask = 0;
76 		 ARMword       tinstr,
124 static ARMword
125 ThumbExpandImm (ARMword tinstr)
127   ARMword val;
169 		ARMword       tinstr,
170 		ARMword       next_instr,
171 		ARMword       pc,
172 		ARMword *     ainstr,
193 	    ARMword cond = tBITS (6, 9);
194 	    ARMword imm6;
195 	    ARMword imm11;
196 	    ARMword J1;
197 	    ARMword J2;
216 	    ARMword imm10 = tBITS (0, 9);
217 	    ARMword imm11 = ntBITS (0, 10);
218 	    ARMword I1 = (ntBIT (13) ^ S) ? 0 : 1;
219 	    ARMword I2 = (ntBIT (11) ^ S) ? 0 : 1;
229 	    ARMword imm10h = tBITS (0, 9);
230 	    ARMword imm10l = ntBITS (1, 10);
231 	    ARMword I1 = (ntBIT (13) ^ S) ? 0 : 1;
232 	    ARMword I2 = (ntBIT (11) ^ S) ? 0 : 1;
245 	    ARMword imm10 = tBITS (0, 9);
246 	    ARMword imm11 = ntBITS (0, 10);
247 	    ARMword I1 = (ntBIT (13) ^ S) ? 0 : 1;
248 	    ARMword I2 = (ntBIT (11) ^ S) ? 0 : 1;
269 	ARMword Rn = tBITS (0, 3);
270 	ARMword Rm = ntBITS (0, 3);
271 	ARMword type = ntBITS (4, 5);
272 	ARMword imm5 = (ntBITS (12, 14) << 2) | ntBITS (6, 7);
289 	  ARMword Rn = tBITS (0, 3);
290 	  ARMword Rm = ntBITS (0, 3);
291 	  ARMword address, dest;
320 	ARMword Rn = tBITS (0, 3);
321 	ARMword Rt = ntBITS (12, 15);
322 	ARMword Rt2 = ntBITS (8, 11);
323 	ARMword imm8 = ntBITS (0, 7);
324 	ARMword P = tBIT (8);
325 	ARMword U = tBIT (7);
326 	ARMword W = tBIT (5);
369 	ARMword Rn   = tBITS (0, 3);
371 	ARMword list = (ntBIT (15) << 15) | (ntBIT (14) << 14) | ntBITS (0, 12);
389 	ARMword Rn   = tBITS (0, 3);
391 	ARMword list = (ntBIT (14) << 14) | ntBITS (0, 12);
408 	ARMword Rd = ntBITS (8, 11);
409 	ARMword Rn = tBITS (0, 3);
410 	ARMword Rm = ntBITS (0, 3);
411 	ARMword imm5 = (ntBITS (12, 14) << 2) | ntBITS (6, 7);
412 	ARMword type = ntBITS (4, 5);
445 	ARMword Rn = tBITS (0, 3);
446 	ARMword S  = tBIT(4);
447 	ARMword Rm = ntBITS (0, 3);
448 	ARMword Rd = ntBITS (8, 11);
449 	ARMword imm5 = (ntBITS (12, 14) << 2) | ntBITS (6, 7);
450 	ARMword type = ntBITS (4, 5);
467 	ARMword Rn = tBITS (0, 3);
468 	ARMword Rd = ntBITS (8, 11);
469 	ARMword Rm = ntBITS (0, 3);
471 	ARMword imm5 = (ntBITS (12, 14) << 2) | ntBITS (6, 7);
472 	ARMword type = ntBITS (4, 5);
524 	ARMword Rd = ntBITS (8, 11);
525 	ARMword Rm = ntBITS (0, 3);
527 	ARMword imm5 = (ntBITS (12, 14) << 2) | ntBITS (6, 7);
528 	ARMword type = ntBITS (4, 5);
547 	ARMword Rn = tBITS (0, 3);
548 	ARMword Rd = ntBITS (8, 11);
549 	ARMword Rm = ntBITS (0, 3);
551 	ARMword imm5 = (ntBITS (12, 14) << 2) | ntBITS (6, 7);
552 	ARMword type = ntBITS (4, 5);
582 	ARMword Rn = tBITS (0, 3);
583 	ARMword Rd = ntBITS (8, 11);
584 	ARMword Rm = ntBITS (0, 3);
586 	ARMword imm5 = (ntBITS (12, 14) << 2) | ntBITS (6, 7);
587 	ARMword type = ntBITS (4, 5);
620 	ARMword Rn = tBITS (0, 3);
621 	ARMword Rd = ntBITS (8, 11);
622 	ARMword Rm = ntBITS (0, 3);
624 	ARMword imm5 = (ntBITS (12, 14) << 2) | ntBITS (6, 7);
625 	ARMword type = ntBITS (4, 5);
646 	ARMword Rn   = tBITS (0, 3);
647 	ARMword Rd   = ntBITS (8, 11);
648 	ARMword Rm   = ntBITS (0, 3);
649 	ARMword S    = tBIT (4);
650 	ARMword type = ntBITS (4, 5);
651 	ARMword imm5 = (ntBITS (12, 14) << 2) | ntBITS (6, 7);
685 	ARMword Rn = tBITS (0, 3);
686 	ARMword imm12 = (tBIT(10) << 11) | (ntBITS (12, 14) << 8) | ntBITS (0, 7);
687 	ARMword Rd = ntBITS (8, 11);
688 	ARMword val;
717 	ARMword Rn = tBITS (0, 3);
718 	ARMword Rd = ntBITS (8, 11);
719 	ARMword S = tBIT (4);
720 	ARMword imm8 = (ntBITS (12, 14) << 8) | ntBITS (0, 7);
736 	ARMword val = (tBIT(10) << 11) | (ntBITS (12, 14) << 8) | ntBITS (0, 7);
737 	ARMword Rd = ntBITS (8, 11);
752 	ARMword val = (tBIT(10) << 11) | (ntBITS (12, 14) << 8) | ntBITS (0, 7);
753 	ARMword Rd = ntBITS (8, 11);
768 	ARMword Rn = tBITS (0, 3);
769 	ARMword Rd = ntBITS (8, 11);
770 	ARMword S = tBIT (4);
771 	ARMword imm12 = ((tBIT (10) << 11) | (ntBITS (12, 14) << 8) | ntBITS (0, 7));
772 	ARMword result;
799 	ARMword Rd = ntBITS (8, 11);
801 	ARMword Rn = tBITS (0, 3);
802 	ARMword lhs = state->Reg[Rn];
803 	ARMword imm12 = (tBIT (10) << 11) | (ntBITS (12, 14) << 8) | ntBITS (0, 7);
804 	ARMword rhs = ThumbExpandImm (imm12);
805 	ARMword res = lhs + rhs;
847 	ARMword Rn = tBITS (0, 3);
848 	ARMword Rd = ntBITS (8, 11);
850 	ARMword imm12 = (tBIT (10) << 11) | (ntBITS (12, 14) << 8) | ntBITS (0, 7);
851 	ARMword lhs = state->Reg[Rn];
852 	ARMword rhs = ThumbExpandImm (imm12);
853 	ARMword res;
889 	ARMword Rn = tBITS (0, 3);
890 	ARMword Rd = ntBITS (8, 11);
892 	ARMword imm12 = (tBIT (10) << 11) | (ntBITS (12, 14) << 8) | ntBITS (0, 7);
893 	ARMword lhs = state->Reg[Rn];
894 	ARMword rhs = ThumbExpandImm (imm12);
895 	ARMword res;
931 	ARMword Rn = tBITS (0, 3);
932 	ARMword Rd = ntBITS (8, 11);
934 	ARMword imm12 = (tBIT (10) << 11) | (ntBITS (12, 14) << 8) | ntBITS (0, 7);
935 	ARMword lhs = state->Reg[Rn];
936 	ARMword rhs = ThumbExpandImm (imm12);
937 	ARMword res = lhs - rhs;
976 	ARMword Rn = tBITS (0, 3);
977 	ARMword Rd = ntBITS (8, 11);
978 	ARMword imm12 = (tBIT (10) << 11) | (ntBITS (12, 14) << 8) | ntBITS (0, 7);
980 	ARMword lhs = imm12;
981 	ARMword rhs = state->Reg[Rn];
982 	ARMword res = lhs - rhs;
1011 	ARMword Rn = tBITS (0, 3);
1012 	ARMword Rd = ntBITS (8, 11);
1013 	ARMword imm12 = (tBIT (10) << 11) | (ntBITS (12, 14) << 8) | ntBITS (0, 7);
1026 	ARMword Rd = ntBITS (8, 11);
1027 	ARMword imm = (tBITS (0, 3) << 12) | (tBIT (10) << 11) | (ntBITS (12, 14) << 8) | ntBITS (0, 7);
1038 	ARMword Rd = ntBITS (8, 11);
1039 	ARMword Rn = tBITS (0, 3);
1040 	ARMword imm12 = (tBIT (10) << 11) | (ntBITS (12, 14) << 8) | ntBITS (0, 7);
1057 	ARMword Rd = ntBITS (8, 11);
1058 	ARMword imm = (tBITS (0, 3) << 12) | (tBIT (10) << 11) | (ntBITS (12, 14) << 8) | ntBITS (0, 7);
1080 	ARMword Rd = ntBITS (8, 11);
1081 	ARMword Rn = tBITS (0, 3);
1082 	ARMword msbit = ntBITS (0, 5);
1083 	ARMword lsbit = (ntBITS (12, 14) << 2) | ntBITS (6, 7);
1084 	ARMword mask = -(1 << lsbit);
1102 	    ARMword val = state->Reg[Rn] & (mask >> lsbit);
1128 	ARMword Rn = tBITS (0, 3);
1129 	ARMword Rt = ntBITS (12, 15);
1179 		ARMword imm12 = ntBITS (0, 11);
1193 		ARMword imm8 = ntBITS (0, 7);
1223 	ARMword Rn = tBITS (0, 3);
1224 	ARMword Rt = ntBITS (12, 15);
1225 	ARMword imm8 = ntBITS (0, 7);
1226 	ARMword P = ntBIT (10);
1227 	ARMword U = ntBIT (9);
1228 	ARMword W = ntBIT (8);
1319 	ARMword Rn = tBITS (0, 3);
1320 	ARMword Rt = ntBITS (12, 15);
1321 	ARMword address;
1330 		ARMword imm12 = ntBITS (0, 11);
1338 		ARMword P = ntBIT (10);
1339 		ARMword U = ntBIT (9);
1340 		ARMword W = ntBIT (8);
1341 		ARMword imm8 = ntBITS (0, 7);
1360 		ARMword Rm = ntBITS (0, 3);
1361 		ARMword imm2 = ntBITS (4, 5);
1375 		ARMword imm12 = ntBITS (0, 11);
1384 		ARMword P = ntBIT (10);
1385 		ARMword U = ntBIT (9);
1386 		ARMword W = ntBIT (8);
1387 		ARMword imm8 = ntBITS (0, 7);
1405 		ARMword Rm = ntBITS (0, 3);
1406 		ARMword imm2 = ntBITS (4, 5);
1421 	ARMword Rn = tBITS (0, 3);
1422 	ARMword Rt = ntBITS (12, 15);
1423 	ARMword imm12 = ntBITS (0, 11);
1424 	ARMword address = state->Reg[Rn];
1446 	ARMword Rt = ntBITS (12, 15);
1447 	ARMword Rn = tBITS (0, 3);
1448 	ARMword U = tBIT (7);
1449 	ARMword address = state->Reg[Rn];
1457 	    ARMword imm12 = ntBITS (0, 11);
1463 	    ARMword imm12 = ntBITS (0, 11);
1485 	    ARMword Rm = ntBITS (0, 3);
1486 	    ARMword imm2 = ntBITS (4,5);
1504 	ARMword Rt = ntBITS (12, 15);
1505 	ARMword Rn = tBITS (0, 3);
1506 	ARMword U = tBIT (7);
1507 	ARMword address = state->Reg[Rn];
1515 	    ARMword imm12 = ntBITS (0, 11);
1538 	    ARMword Rm = ntBITS (0, 3);
1539 	    ARMword imm2 = ntBITS (4,5);
1556 	ARMword Rm = ntBITS (0, 3);
1557 	ARMword Rd = ntBITS (8, 11);
1564 	    ARMword ror = ntBITS (4, 5) << 3;
1565 	    ARMword val;
1576 	    ARMword Rn = tBITS (0, 3);
1590 	ARMword Rd = ntBITS (8, 11);
1591 	ARMword Rn = tBITS (0, 3);
1592 	ARMword Rm = ntBITS (0, 3);
1643 	ARMword Rn = tBITS (0, 3);
1644 	ARMword Rd = ntBITS (8, 11);
1645 	ARMword Rm = ntBITS (0, 3);
1652 	    ARMword val = state->Reg[Rm];
1684 	ARMword Rn = tBITS (0, 3);
1685 	ARMword Rd = ntBITS (8, 11);
1686 	ARMword Rm = ntBITS (0, 3);
1712 	ARMword Rn = tBITS (0, 3);
1713 	ARMword Rm = ntBITS (0, 3);
1714 	ARMword Rd = ntBITS (8, 11);
1715 	ARMword Ra = ntBITS (12, 15);
1720 	    ARMword nval = state->Reg[Rn];
1721 	    ARMword mval = state->Reg[Rm];
1722 	    ARMword res;
1848 		      ARMword       tinstr,
1849 		      ARMword       next_instr,
1850 		      ARMword       pc,
1851 		      ARMword *     ainstr,
1865       ARMword Rn = tBITS (0, 2);
1866       ARMword imm5 = tBIT (9) << 5 | tBITS (3, 7);
1895 	ARMword Rd = (tBIT (7) << 3) | tBITS (0, 2);
1896 	ARMword Rm = tBITS (3, 6);
1907 	ARMword Rd = (tBIT(7) << 3) | tBITS (0, 2);
1942 	ARMword val = state->Reg[tBITS (3, 5)];
1953 	ARMword val = state->Reg[tBITS (3, 5)];
1969 	ARMword Rm = state->Reg [(tinstr & 0x38) >> 3];
1980 	ARMword Rm = state->Reg [(tinstr & 0x38) >> 3];
1991 	ARMword Rm = state->Reg [(tinstr & 0x38) >> 3];
1999 	ARMword Rm = state->Reg [(tinstr & 0x38) >> 3];
2016 		   ARMword       pc,
2017 		   ARMword       tinstr,
2018 		   ARMword *     ainstr)
2021   ARMword next_instr;
2022   ARMword  old_tinstr = tinstr;
2082 	ARMword subset[4] =
2136 	    ARMword opcode;
2166 		ARMword opcode;
2219 	  ARMword Rd = ((tinstr & 0x0007) >> 0);
2220 	  ARMword Rs = ((tinstr & 0x0038) >> 3);
2288 	  ARMword subset[4] = {
2302 	  ARMword subset[4] = {
2320 	ARMword subset[4] = {
2546 	    ARMword tmp = (pc + 2);
2587 	      ARMword tmp = (pc + 2);
2618 	ARMword tmp = pc;