Lines Matching defs:wR

37 static ARMdword wR[16];
43 #define wRBITS(w,x,y) SUBSTR (wR[w], ARMdword, x, y)
101 shift = wR [reg]; \
692 wR [wRd] = (Rn << 56) | (Rn << 48) | (Rn << 40) | (Rn << 32)
698 wR [wRd] = (Rn << 48) | (Rn << 32) | (Rn << 16) | Rn;
703 wR [wRd] = (Rn << 32) | Rn;
837 case 0: wR [wRd] = data | (wRBITS (wRd, 8, 63) << 8); break;
838 case 1: wR [wRd] = wRBITS (wRd, 0, 7) | (data << 8) | (wRBITS (wRd, 16, 63) << 16); break;
839 case 2: wR [wRd] = wRBITS (wRd, 0, 15) | (data << 16) | (wRBITS (wRd, 24, 63) << 24); break;
840 case 3: wR [wRd] = wRBITS (wRd, 0, 23) | (data << 24) | (wRBITS (wRd, 32, 63) << 32); break;
841 case 4: wR [wRd] = wRBITS (wRd, 0, 31) | (data << 32) | (wRBITS (wRd, 40, 63) << 40); break;
842 case 5: wR [wRd] = wRBITS (wRd, 0, 39) | (data << 40) | (wRBITS (wRd, 48, 63) << 48); break;
843 case 6: wR [wRd] = wRBITS (wRd, 0, 47) | (data << 48) | (wRBITS (wRd, 56, 63) << 56); break;
844 case 7: wR [wRd] = wRBITS (wRd, 0, 55) | (data << 56); break;
853 case 0: wR [wRd] = data | (wRBITS (wRd, 16, 63) << 16); break;
854 case 1: wR [wRd] = wRBITS (wRd, 0, 15) | (data << 16) | (wRBITS (wRd, 32, 63) << 32); break;
855 case 2: wR [wRd] = wRBITS (wRd, 0, 31) | (data << 32) | (wRBITS (wRd, 48, 63) << 48); break;
856 case 3: wR [wRd] = wRBITS (wRd, 0, 47) | (data << 48); break;
862 wR [wRd] = wRBITS (wRd, 0, 31) | (data << 32);
864 wR [wRd] = (wRBITS (wRd, 32, 63) << 32) | data;
941 wR [BITS (0, 3)] = (RdHi << 32) | RdLo;
972 wR [BITS (5, 8)] += a * b;
1010 wR [BITS (5, 8)] += r;
1023 wR [BITS (5, 8)] += r;
1073 wR [BITS (5, 8)] += temp;
1247 wR [BITS (12, 15)] =
1255 wR [BITS (12, 15)] =
1261 wR [BITS (12, 15)] = wRBITS (wRn, 32, 63) + wRBITS (wRn, 0, 31);
1455 wR [BITS (12, 15)] = r;
1478 wR [BITS (12, 15)] =
1482 wR [BITS (12, 15)] = wR [BITS (16, 19)];
1501 wR [BITS (12, 15)] =
1505 wR [BITS (12, 15)] = wR [BITS (16, 19)];
1524 result = wR [BITS (16, 19)] & wR [BITS (0, 3)];
1525 wR [BITS (12, 15)] = result;
1549 result = wR [BITS (16, 19)] & ~ wR [BITS (0, 3)];
1550 wR [BITS (12, 15)] = result;
1600 wR [BITS (12, 15)] = r;
1660 wR [BITS (12, 15)] = r;
1781 wR [BITS (12, 15)] = r;
2076 wR [BITS (12, 15)] = Iwmmxt_Load_Byte (state, address);
2079 wR [BITS (12, 15)] = Iwmmxt_Load_Half_Word (state, address);
2085 wR [BITS (12, 15)] = Iwmmxt_Load_Word (state, address);
2088 wR [BITS (12, 15)] = Iwmmxt_Load_Double_Word (state, address);
2143 wR [BITS (12, 15)] = t;
2145 wR[BITS (12, 15)] += t;
2207 wR [BITS (12, 15)] = r;
2336 wR [BITS (12, 15)] = r;
2466 wR [BITS (12, 15)] = r;
2519 wR [BITS (12, 15)] = r;
2538 result = wR [BITS (16, 19)] | wR [BITS (0, 3)];
2539 wR [BITS (12, 15)] = result;
2628 x = wR [i ? BITS (0, 3) : BITS (16, 19)];
2657 wR [BITS (12, 15)] = r;
2710 r = (wR [BITS (16, 19)] >> shift)
2711 | (wR [BITS (16, 19)] << (64 - shift));
2723 wR [BITS (12, 15)] = r;
2744 r = BIT (20) ? 0 : (wR [BITS (12, 15)] & 0xffffffff);
2761 wR [BITS (12, 15)] = r;
2794 wR [BITS (12, 15)] = r;
2850 r = ((wR[BITS (16, 19)] & 0xffffffffffffffffULL) << shift);
2862 wR [BITS (12, 15)] = r;
2927 r = (wR [BITS (16, 19)] & 0x8000000000000000ULL) ? 0xffffffffffffffffULL : 0;
2929 r = ((signed long long) (wR[BITS (16, 19)] & 0xffffffffffffffffULL) >> shift);
2940 wR [BITS (12, 15)] = r;
2998 r = (wR [BITS (16, 19)] & 0xffffffffffffffffULL) >> shift;
3010 wR [BITS (12, 15)] = r;
3043 Iwmmxt_Store_Byte (state, address, wR [BITS (12, 15)]);
3046 Iwmmxt_Store_Half_Word (state, address, wR [BITS (12, 15)]);
3052 Iwmmxt_Store_Word (state, address, wR [BITS (12, 15)]);
3055 Iwmmxt_Store_Double_Word (state, address, wR [BITS (12, 15)]);
3241 wR [BITS (12, 15)] = r;
3312 wR [BITS (12, 15)] = r;
3379 wR [BITS (12, 15)] = r;
3448 wR [BITS (12, 15)] = r;
3517 wR [BITS (12, 15)] = r;
3536 result = wR [BITS (16, 19)] ^ wR [BITS (0, 3)];
3537 wR [BITS (12, 15)] = result;
3722 memcpy (memory, wR + regnum, sizeof wR [0]);
3723 return sizeof wR [0];
3737 memcpy (wR + regnum, memory, sizeof wR [0]);
3738 return sizeof wR [0];