sim/sh64/cpu.c

49 sh64_h_gr_get (SIM_CPU *current_cpu, UINT regno)
51   return GET_H_GR (regno);
57 sh64_h_gr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
59   SET_H_GR (regno, newval);
65 sh64_h_grc_get (SIM_CPU *current_cpu, UINT regno)
67   return GET_H_GRC (regno);
73 sh64_h_grc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
75   SET_H_GRC (regno, newval);
81 sh64_h_cr_get (SIM_CPU *current_cpu, UINT regno)
83   return GET_H_CR (regno);
89 sh64_h_cr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
91   SET_H_CR (regno, newval);
225 sh64_h_fr_get (SIM_CPU *current_cpu, UINT regno)
227   return CPU (h_fr[regno]);
233 sh64_h_fr_set (SIM_CPU *current_cpu, UINT regno, SF newval)
235   CPU (h_fr[regno]) = newval;
241 sh64_h_fp_get (SIM_CPU *current_cpu, UINT regno)
243   return GET_H_FP (regno);
249 sh64_h_fp_set (SIM_CPU *current_cpu, UINT regno, SF newval)
251   SET_H_FP (regno, newval);
257 sh64_h_fv_get (SIM_CPU *current_cpu, UINT regno)
259   return GET_H_FV (regno);
265 sh64_h_fv_set (SIM_CPU *current_cpu, UINT regno, SF newval)
267   SET_H_FV (regno, newval);
273 sh64_h_fmtx_get (SIM_CPU *current_cpu, UINT regno)
275   return GET_H_FMTX (regno);
281 sh64_h_fmtx_set (SIM_CPU *current_cpu, UINT regno, SF newval)
283   SET_H_FMTX (regno, newval);
289 sh64_h_dr_get (SIM_CPU *current_cpu, UINT regno)
291   return GET_H_DR (regno);
297 sh64_h_dr_set (SIM_CPU *current_cpu, UINT regno, DF newval)
299   SET_H_DR (regno, newval);
305 sh64_h_fsd_get (SIM_CPU *current_cpu, UINT regno)
307   return GET_H_FSD (regno);
313 sh64_h_fsd_set (SIM_CPU *current_cpu, UINT regno, DF newval)
315   SET_H_FSD (regno, newval);
321 sh64_h_fmov_get (SIM_CPU *current_cpu, UINT regno)
323   return GET_H_FMOV (regno);
329 sh64_h_fmov_set (SIM_CPU *current_cpu, UINT regno, DF newval)
331   SET_H_FMOV (regno, newval);
337 sh64_h_tr_get (SIM_CPU *current_cpu, UINT regno)
339   return CPU (h_tr[regno]);
345 sh64_h_tr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
347   CPU (h_tr[regno]) = newval;
385 sh64_h_frc_get (SIM_CPU *current_cpu, UINT regno)
387   return GET_H_FRC (regno);
393 sh64_h_frc_set (SIM_CPU *current_cpu, UINT regno, SF newval)
395   SET_H_FRC (regno, newval);
401 sh64_h_drc_get (SIM_CPU *current_cpu, UINT regno)
403   return GET_H_DRC (regno);
409 sh64_h_drc_set (SIM_CPU *current_cpu, UINT regno, DF newval)
411   SET_H_DRC (regno, newval);
417 sh64_h_xf_get (SIM_CPU *current_cpu, UINT regno)
419   return GET_H_XF (regno);
425 sh64_h_xf_set (SIM_CPU *current_cpu, UINT regno, SF newval)
427   SET_H_XF (regno, newval);
433 sh64_h_xd_get (SIM_CPU *current_cpu, UINT regno)
435   return GET_H_XD (regno);
441 sh64_h_xd_set (SIM_CPU *current_cpu, UINT regno, DF newval)
443   SET_H_XD (regno, newval);
449 sh64_h_fvc_get (SIM_CPU *current_cpu, UINT regno)
451   return GET_H_FVC (regno);
457 sh64_h_fvc_set (SIM_CPU *current_cpu, UINT regno, SF newval)
459   SET_H_FVC (regno, newval);