sim/bfin/machs.c

69 #define PORT(_dst, _dst_port, _src, _src_port) \
76 #define SIC(_s, _ip, _d, _op) PORT("bfin_sic", "int"#_ip"@"#_s, _d, _op)
715 /*PORT ("glue-or@1", "int", "bfin_dmac@0",   "stat"),*/
716   PORT ("glue-or@1", "int", "bfin_dmar@0",   "block"),
717   PORT ("glue-or@1", "int", "bfin_dmar@1",   "block"),
718   PORT ("glue-or@1", "int", "bfin_dmar@0",   "overflow"),
719   PORT ("glue-or@1", "int", "bfin_dmar@1",   "overflow"),
721   PORT ("glue-or@2", "int", "bfin_can@0",    "stat"),
722   PORT ("glue-or@2", "int", "bfin_emac",     "stat"),
723   PORT ("glue-or@2", "int", "bfin_sport@0",  "stat"),
724   PORT ("glue-or@2", "int", "bfin_sport@1",  "stat"),
725   PORT ("glue-or@2", "int", "bfin_ppi@0",    "stat"),
726   PORT ("glue-or@2", "int", "bfin_spi@0",    "stat"),
727   PORT ("glue-or@2", "int", "bfin_uart@0",   "stat"),
728   PORT ("glue-or@2", "int", "bfin_uart@1",   "stat"),
744   PORT ("glue-or@17", "int", "bfin_dma@1",   "di"),
745   PORT ("glue-or@17", "int", "bfin_gpio@7",  "mask_a"),
747   PORT ("glue-or@18", "int", "bfin_dma@2",   "di"),
748   PORT ("glue-or@18", "int", "bfin_gpio@7",  "mask_b"),
758   PORT ("glue-or@27", "int", "bfin_gpio@5",   "mask_a"),
759   PORT ("glue-or@27", "int", "bfin_gpio@6",   "mask_a"),
766   PORT ("glue-or@31", "int", "bfin_wdog@0",   "gpi"),
767   PORT ("glue-or@31", "int", "bfin_gpio@5",   "mask_b"),
1050   PORT (p, "piq0@"#b,  g, "p0"), \
1051   PORT (p, "piq1@"#b,  g, "p1"), \
1052   PORT (p, "piq2@"#b,  g, "p2"), \
1053   PORT (p, "piq3@"#b,  g, "p3"), \
1054   PORT (p, "piq4@"#b,  g, "p4"), \
1055   PORT (p, "piq5@"#b,  g, "p5"), \
1056   PORT (p, "piq6@"#b,  g, "p6"), \
1057   PORT (p, "piq7@"#b,  g, "p7"), \
1058   PORT (p, "piq8@"#b,  g, "p8"), \
1059   PORT (p, "piq9@"#b,  g, "p9"), \
1060   PORT (p, "piq10@"#b, g, "p10"), \
1061   PORT (p, "piq11@"#b, g, "p11"), \
1062   PORT (p, "piq12@"#b, g, "p12"), \
1063   PORT (p, "piq13@"#b, g, "p13"), \
1064   PORT (p, "piq14@"#b, g, "p14"), \
1065   PORT (p, "piq15@"#b, g, "p15")