Lines Matching refs:ARMword

61 extern unsigned ARMul_OSHandleSWI  (ARMul_State *, ARMword);
74 ARMword ErrorNo;
81 static ARMword softvectorcode[] =
107 ARMword instr, i, j;
206 SWIWrite0 (ARMul_State * state, ARMword addr)
208 ARMword temp;
224 WriteCommandLineTo (ARMul_State * state, ARMword addr)
226 ARMword temp;
233 temp = (ARMword) * cptr++;
240 ReadFileName (ARMul_State * state, char *buf, ARMword src, size_t n)
254 SWIopen (ARMul_State * state, ARMword name, ARMword SWIflags)
285 SWIread (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
312 SWIwrite (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
316 ARMword i;
339 SWIflen (ARMul_State * state, ARMword fh)
342 ARMword addr;
360 SWIremove (ARMul_State * state, ARMword path)
373 SWIrename (ARMul_State * state, ARMword old, ARMword new)
390 ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
425 ? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
426 : (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
429 (ARMword) (clock () / 10000);
440 state->Reg[0] = (ARMword) sim_callback->time (sim_callback, NULL);
556 ARMword addr;
557 ARMword temp;
585 ? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
586 : (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
589 (ARMword) (clock () / 10000);
595 state->Reg[0] = (ARMword) sim_callback->time (sim_callback, NULL);
713 ARMword addr = state->RegBank[UNDEFBANK][14] - 4;
784 state->Reg[0] = state->Reg[1] = (ARMword) sim_callback->time (sim_callback, NULL);
810 ARMword totmem = state->Reg[1],
812 ARMword stack = state->MemSize > 0
840 ARMword cpsr;
841 ARMword i_size;