Lines Matching refs:AARCH64_DECL_OPD_INSERTER

40 #define AARCH64_DECL_OPD_INSERTER(x)	\
45 AARCH64_DECL_OPD_INSERTER (ins_none);
46 AARCH64_DECL_OPD_INSERTER (ins_regno);
47 AARCH64_DECL_OPD_INSERTER (ins_reglane);
48 AARCH64_DECL_OPD_INSERTER (ins_reglist);
49 AARCH64_DECL_OPD_INSERTER (ins_ldst_reglist);
50 AARCH64_DECL_OPD_INSERTER (ins_ldst_reglist_r);
51 AARCH64_DECL_OPD_INSERTER (ins_ldst_elemlist);
52 AARCH64_DECL_OPD_INSERTER (ins_advsimd_imm_shift);
53 AARCH64_DECL_OPD_INSERTER (ins_imm);
54 AARCH64_DECL_OPD_INSERTER (ins_imm_half);
55 AARCH64_DECL_OPD_INSERTER (ins_advsimd_imm_modified);
56 AARCH64_DECL_OPD_INSERTER (ins_fpimm);
57 AARCH64_DECL_OPD_INSERTER (ins_fbits);
58 AARCH64_DECL_OPD_INSERTER (ins_aimm);
59 AARCH64_DECL_OPD_INSERTER (ins_limm);
60 AARCH64_DECL_OPD_INSERTER (ins_inv_limm);
61 AARCH64_DECL_OPD_INSERTER (ins_ft);
62 AARCH64_DECL_OPD_INSERTER (ins_addr_simple);
63 AARCH64_DECL_OPD_INSERTER (ins_addr_offset);
64 AARCH64_DECL_OPD_INSERTER (ins_addr_regoff);
65 AARCH64_DECL_OPD_INSERTER (ins_addr_simm);
66 AARCH64_DECL_OPD_INSERTER (ins_addr_simm10);
67 AARCH64_DECL_OPD_INSERTER (ins_addr_uimm12);
68 AARCH64_DECL_OPD_INSERTER (ins_simd_addr_post);
69 AARCH64_DECL_OPD_INSERTER (ins_cond);
70 AARCH64_DECL_OPD_INSERTER (ins_sysreg);
71 AARCH64_DECL_OPD_INSERTER (ins_pstatefield);
72 AARCH64_DECL_OPD_INSERTER (ins_sysins_op);
73 AARCH64_DECL_OPD_INSERTER (ins_barrier);
74 AARCH64_DECL_OPD_INSERTER (ins_hint);
75 AARCH64_DECL_OPD_INSERTER (ins_prfop);
76 AARCH64_DECL_OPD_INSERTER (ins_reg_extended);
77 AARCH64_DECL_OPD_INSERTER (ins_reg_shifted);
78 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s4);
79 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s4xvl);
80 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s6xvl);
81 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s9xvl);
82 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_u6);
83 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_rr_lsl);
84 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_rz_xtw);
85 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zi_u5);
86 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_lsl);
87 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_sxtw);
88 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_uxtw);
89 AARCH64_DECL_OPD_INSERTER (ins_sve_aimm);
90 AARCH64_DECL_OPD_INSERTER (ins_sve_asimm);
91 AARCH64_DECL_OPD_INSERTER (ins_sve_float_half_one);
92 AARCH64_DECL_OPD_INSERTER (ins_sve_float_half_two);
93 AARCH64_DECL_OPD_INSERTER (ins_sve_float_zero_one);
94 AARCH64_DECL_OPD_INSERTER (ins_sve_index);
95 AARCH64_DECL_OPD_INSERTER (ins_sve_limm_mov);
96 AARCH64_DECL_OPD_INSERTER (ins_sve_quad_index);
97 AARCH64_DECL_OPD_INSERTER (ins_sve_reglist);
98 AARCH64_DECL_OPD_INSERTER (ins_sve_scale);
99 AARCH64_DECL_OPD_INSERTER (ins_sve_shlimm);
100 AARCH64_DECL_OPD_INSERTER (ins_sve_shrimm);
101 AARCH64_DECL_OPD_INSERTER (ins_imm_rotate1);
102 AARCH64_DECL_OPD_INSERTER (ins_imm_rotate2);
104 #undef AARCH64_DECL_OPD_INSERTER