Lines Matching defs:immisreg

550     unsigned immisreg	: 2;  /* .imm field is a second register.
5605 inst.operands[i].immisreg = 1;
5904 [Rn, +/-Rm] .reg=Rn .imm=Rm .immisreg=1 .negative=0/1
5905 [Rn, +/-Rm, shift] .reg=Rn .imm=Rm .immisreg=1 .negative=0/1
5913 [Rn], +/-Rm .reg=Rn .imm=Rm .immisreg=1 .negative=0/1
5914 [Rn], +/-Rm, shift .reg=Rn .imm=Rm .immisreg=1 .negative=0/1
5919 [Rn], {option} .reg=Rn .imm=option .immisreg=0
5998 inst.operands[i].immisreg = 2;
6015 inst.operands[i].immisreg = 1;
6174 inst.operands[i].immisreg = 2;
6185 inst.operands[i].immisreg = 1;
8369 if (inst.operands[i].immisreg)
8391 if (inst.operands[i].immisreg)
8471 if (inst.operands[i].immisreg)
8528 if (inst.operands[i].immisreg && inst.operands[i].shifted)
8536 if (inst.operands[i].immisreg)
9835 if (inst.operands[2].immisreg
9849 || inst.operands[1].immisreg || inst.operands[1].shifted
9897 constraint (!(inst.operands[1].immisreg)
10573 || inst.operands[2].immisreg || inst.operands[2].shifted
10597 || inst.operands[2].immisreg || inst.operands[2].shifted
11120 && inst.operands[1].immisreg)
11309 constraint (inst.operands[i].immisreg,
11352 if (inst.operands[i].immisreg)
11731 constraint (inst.operands[2].shifted && inst.operands[2].immisreg,
11891 && inst.operands[2].immisreg,
11988 && inst.operands[2].immisreg,
12676 || inst.operands[1].immisreg || inst.operands[1].shifted
12735 if (inst.operands[1].immisreg)
12787 && !inst.operands[1].immisreg)
12799 if (inst.operands[1].immisreg)
12819 constraint (!inst.operands[1].isreg || !inst.operands[1].immisreg
12843 constraint (inst.operands[1].immisreg,
12859 if (!inst.operands[1].immisreg)
13085 else if (inst.operands[1].shifted && inst.operands[1].immisreg
13353 && inst.operands[1].immisreg,
13661 && inst.operands[2].immisreg,
13713 if (inst.operands[0].immisreg)
14185 || inst.operands[2].immisreg || inst.operands[2].shifted
14283 constraint (inst.operands[0].immisreg,
17389 constraint (inst.operands[1].immisreg, BAD_ADDR_MODE);
17608 if (inst.operands[1].immisreg == 2)
17613 else if (!inst.operands[1].immisreg)
17633 || inst.operands[1].immisreg != 0,
20797 if (inst.operands[1].immisreg)
21146 constraint (!inst.operands[1].immisreg,
21154 constraint (inst.operands[1].immisreg, BAD_ADDR_MODE);