config/sparc/sparc.cc

1009 	   && REGNO (recog_data.operand[1]) == reg)
1012 	      && REGNO (recog_data.operand[2]) == reg));
1230 	  const unsigned int dest_reg = REGNO (SET_DEST (single_set (insn)));
1252 		  && REGNO (SET_DEST (set)) > 31)
1256 		  if (REGNO (SET_DEST (set)) == dest_reg)
1363 	       && REGNO (SET_DEST (set)) > 31
1364 	       && REGNO (SET_DEST (set)) % 2 != 0)
1367 	  const unsigned int x = REGNO (SET_DEST (set)) - 1;
1387 	      dest = REGNO (recog_data.operand[0]);
1388 	      src1 = REGNO (recog_data.operand[1]);
1389 	      src2 = REGNO (recog_data.operand[2]);
1412 	      dest = REGNO (recog_data.operand[0]);
1413 	      src1 = REGNO (recog_data.operand[1]);
1434 	       && REGNO (SET_DEST (set)) < 32)
1457 		  && REGNO (dest) < 32
1466 			       && REGNO (src) < 32
1467 			       && REGNO (src) != REGNO (x)))
1484 	       && REGNO (SET_DEST (set)) > 31)
1489 	  const unsigned int x = REGNO (SET_DEST (set));
1505 		&& REGNO (SET_DEST (set)) == y))
1549 		      && (REGNO (dest) == x
1550 			  || (REGNO (dest) == y && size == 8)))
1557 		      if (REGNO (src) == y || (REGNO (src) == x && size == 8))
1561 		      if (REGNO (src) == x && size == 4)
2367       && (SPARC_FP_REG_P (REGNO (operands[0]))
2379       if ((TARGET_VIS || REGNO (operands[0]) < SPARC_FIRST_FP_REG)
2384       if (REGNO (operands[0]) < SPARC_FIRST_FP_REG
2507       temp = gen_rtx_REG (DImode, REGNO (temp));
2589 	      temp = gen_rtx_REG (DImode, REGNO (temp) + 1);
2660 		  temp = gen_rtx_REG (DImode, REGNO (temp) + 1);
3038 		  || (REG_P (op0) && ! SPARC_FP_REG_P (REGNO (op0)))));
3683   int regno = REGNO (reg);
4062       && SPARC_FP_REG_P (REGNO (src_reg)))
4164 	  regno = REGNO (SET_DEST (expr));
4177   regno = REGNO (SET_DEST (pat));
4228       || (REGNO (SET_DEST (pat)) >= 8 && REGNO (SET_DEST (pat)) < 24)
4229       || ! SPARC_INT_REG_P (REGNO (SET_DEST (pat))))
4360 		     reg_names[REGNO (got_register_rtx)] + 1);
4363 					 REGNO (got_register_rtx));
4516       && ORIGINAL_REGNO (x) == REGNO (pic_offset_table_rtx))
4657       if (!REGNO_OK_FOR_BASE_P (REGNO (rs1))
4658 	  || (rs2 && !REGNO_OK_FOR_BASE_P (REGNO (rs2))))
4663       if ((! SPARC_INT_REG_P (REGNO (rs1))
4664 	   && REGNO (rs1) != FRAME_POINTER_REGNUM
4665 	   && REGNO (rs1) < FIRST_PSEUDO_REGISTER)
4667 	      && (! SPARC_INT_REG_P (REGNO (rs2))
4668 		  && REGNO (rs2) != FRAME_POINTER_REGNUM
4669 		  && REGNO (rs2) < FIRST_PSEUDO_REGISTER)))
5210       int regno = REGNO (base);
5452 /* Return whether REGNO, a global or FP register, must be saved/restored.  */
5480 /* Return whether REGNO, a local or in register, must be saved/restored.  */
5498   if (got_register_rtx && regno == REGNO (got_register_rtx))
7320    REGNO is the hard register the union will be passed in.  */
7357    REGNO is the hard register the vector will be passed in.  */
8347 	    v9_fcc_labelno[5] = REGNO (cc_reg) - SPARC_FIRST_V9_FCC_REG + '0';
8351 		gcc_assert (REGNO (cc_reg) == SPARC_FCC_REG);
8899       if (REGNO (*where) >= 8 && REGNO (*where) < 24)      /* oX or lX */
8901       if (! test && REGNO (*where) >= 24 && REGNO (*where) < 32)
8906 				   OUTGOING_REGNO (REGNO (*where)));
8912 				  OUTGOING_REGNO (REGNO (*where)));
8934 	  && REGNO (XEXP (*where, 0)) == HARD_FRAME_POINTER_REGNUM
8943 	  && REGNO (XEXP (*where, 0)) == HARD_FRAME_POINTER_REGNUM)
9032   if ((REGNO (reg) % 2) == 0 && mem_min_alignment (mem, 8))
9087   const int regno1 = REGNO (reg1);
9093   const int regno2 = REGNO (reg2);
9132 /* Return 1 if REGNO (reg1) is even and REGNO (reg1) == REGNO (reg2) - 1.
9144   if (REGNO (reg1) % 2 != 0)
9148   if (TARGET_V9 && SPARC_INT_REG_P (REGNO (reg1)))
9151   return (REGNO (reg1) == REGNO (reg2) - 1);
9211           reg1 = REGNO (XEXP (addr1, 0));
9222       reg1 = REGNO (addr1);
9235   if (reg1 != REGNO (XEXP (addr2, 0)))
9238   if (dependent_reg_rtx != NULL_RTX && reg1 == REGNO (dependent_reg_rtx))
9276   if (REGNO (reg) < FIRST_PSEUDO_REGISTER)
9277     return (REGNO (reg) % 2 == 0);
9396       else if (REGNO (x) < 8)
9397 	fputs (reg_names[REGNO (x)], file);
9398       else if (REGNO (x) >= 24 && REGNO (x) < 32)
9399 	fputs (reg_names[REGNO (x)-16], file);
9406 	fputs (reg_names[REGNO (x)+1], file);
9408 	fputs (reg_names[REGNO (x)], file);
9413 	fputs (reg_names[REGNO (x)], file);
9415 	fputs (reg_names[REGNO (x)+1], file);
9420       fputs (reg_names[REGNO (x)+1], file);
9425       fputs (reg_names[REGNO (x)+2], file);
9430       fputs (reg_names[REGNO (x)+3], file);
9434       if (REGNO (x) == SPARC_ICC_REG)
9457 	fputs (reg_names[REGNO (x)], file);
9669     fputs (reg_names[REGNO (x)], file);
9711     fputs (reg_names[REGNO (addr)], file);
9732 	  fputs (reg_names[REGNO (base)], file);
9736 	    fprintf (file, "+%s", reg_names[REGNO (index)]);
10579     y = gen_rtx_REG (SImode, REGNO (x) + WORDS_BIG_ENDIAN);
10582       && df && DF_REG_DEF_COUNT (REGNO (y)) == 1)