Lines Matching refs:mem2

8616 aarch64_gen_store_pair (machine_mode mode, rtx mem1, rtx reg1, rtx mem2,
8622 return gen_store_pair_dw_didi (mem1, reg1, mem2, reg2);
8625 return gen_store_pair_dw_dfdf (mem1, reg1, mem2, reg2);
8628 return gen_store_pair_dw_tftf (mem1, reg1, mem2, reg2);
8631 return gen_vec_store_pairv4siv4si (mem1, reg1, mem2, reg2);
8634 return gen_vec_store_pairv16qiv16qi (mem1, reg1, mem2, reg2);
8646 rtx mem2)
8651 return gen_load_pair_dw_didi (reg1, mem1, reg2, mem2);
8654 return gen_load_pair_dw_dfdf (reg1, mem1, reg2, mem2);
8657 return gen_load_pair_dw_tftf (reg1, mem1, reg2, mem2);
8660 return gen_load_pairv4siv4si (reg1, mem1, reg2, mem2);
8828 rtx mem2;
8831 mem2 = gen_frame_mem (mode, plus_constant (Pmode, base_rtx, offset));
8832 insn = emit_insn (aarch64_gen_store_pair (mode, mem, reg, mem2,
8912 rtx mem2;
8915 mem2 = gen_frame_mem (mode, plus_constant (Pmode, base_rtx, offset));
8916 emit_insn (aarch64_gen_load_pair (mode, reg, mem, reg2, mem2));
9247 rtx mem2 = gen_frame_mem (mode, addr2);
9248 rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2)
9249 : gen_rtx_SET (reg2, mem2);
9252 insn = emit_insn (aarch64_gen_store_pair (mode, mem, reg, mem2, reg2));
9254 insn = emit_insn (aarch64_gen_load_pair (mode, reg, mem, reg2, mem2));
25822 aarch64_check_consecutive_mems (rtx *mem1, rtx *mem2, bool *reversed)
25828 || GET_RTX_CLASS (GET_CODE (XEXP (*mem2, 0))) == RTX_AUTOINC)
25831 if (!MEM_SIZE_KNOWN_P (*mem1) || !MEM_SIZE_KNOWN_P (*mem2))
25835 auto size2 = MEM_SIZE (*mem2);
25839 extract_base_offset_in_addr (*mem2, &base2, &offset2);
25867 && MEM_EXPR (*mem2)
25869 && MEM_OFFSET_KNOWN_P (*mem2))
25875 tree expr_base2 = get_addr_base_and_unit_offset (MEM_EXPR (*mem2),
25884 expr_offset2 += MEM_OFFSET (*mem2);
25897 rtx addr1 = plus_constant (Pmode, XEXP (*mem2, 0),
25905 *mem2 = replace_equiv_address_nv (*mem2, addr2);
25918 aarch64_mergeable_load_pair_p (machine_mode mode, rtx mem1, rtx mem2)
25922 return aarch64_check_consecutive_mems (&mem1, &mem2, nullptr);