Lines Matching refs:REG_P
200 if (! REG_P (reg))
279 && ((REG_P (src) || MEM_P (src))
281 && (REG_P (SUBREG_REG (src)) || MEM_P (SUBREG_REG (src)))))))
373 if (REG_P (m_base_reg))
381 if (REG_P (m_index_reg))
498 if (! REG_P (x) || (regno = REGNO (x)) < FIRST_PSEUDO_REGISTER
610 if (REG_P (original)
615 && ((REG_P (src) || MEM_P (src))
617 && (REG_P (SUBREG_REG (src)) || MEM_P (SUBREG_REG (src))))))
675 else if (REG_P (original)
676 && REG_P (curr_insn_input_reloads[i].input)
737 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
738 && (REG_P (y) || (GET_CODE (y) == SUBREG && REG_P (SUBREG_REG (y)))))
772 if (code == REG && REG_P (y))
775 if (code == REG && GET_CODE (y) == SUBREG && REG_P (SUBREG_REG (y))
778 if (GET_CODE (y) == REG && code == SUBREG && REG_P (SUBREG_REG (x))
894 if (! REG_P (reg) || (int) REGNO (reg) < new_regno_start)
910 if (REG_P (x) && lra_reg_info[REGNO (x)].val == lra_reg_info[regno].val)
990 if (REG_P (in_rtx) && (int) REGNO (in_rtx) < lra_new_regno_start
1016 if (REG_P (subreg_reg)
1059 if (REG_P (in_rtx))
1064 if (outs[i] != out && REG_P (other_out_rtx)
1075 = (! early_clobber_p && ins[1] < 0 && REG_P (in_rtx)
1126 if (out >= 0 && curr_static_id->operand[out].strict_low && REG_P (reg))
1181 return REG_P (op) ? get_reg_class (REGNO (op)) : NO_REGS;
1233 if (! (REG_P (dreg) || MEM_P (dreg)) || ! (REG_P (sreg) || MEM_P (sreg)))
1236 if (REG_P (dreg))
1248 if (REG_P (sreg))
1264 if (! REG_P (dreg) || ! REG_P (sreg))
1440 if (!REG_P (reg)
1448 if (! REG_P (reg))
1678 else if (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER)
1711 if ((REG_P (reg)
1727 if (REG_P (reg))
1790 else if (REG_P (reg)
1864 if (REG_P (x) || SUBREG_P (x))
1902 return (REG_P (op)
2042 if (! REG_P (reg))
2261 if ((REG_P (*curr_id->operand_loc[nop])
2263 && (REG_P (*curr_id->operand_loc[m])
2273 if (REG_P (nop_reg)
2276 && REG_P (m_reg)
2405 || MEM_P (op) || REG_P (op)
2457 if (REG_P (op))
2623 if (! no_regs_p && REG_P (op) && hard_regno[nop] < 0
2648 && REG_P (op)
2669 && REG_P (op)
2786 if (offmemok && REG_P (op))
2816 if (! (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER))
2860 && !(REG_P (op) && hard_regno[nop] < 0))
2866 nop, REG_P (op) ? "" : "Non-");
2901 && REG_P (op) && (cl = get_reg_class (REGNO (op))) != NO_REGS
2917 if (!REG_P (op) || curr_static_id->operand[nop].type != OP_IN)
2991 && REG_P (no_subreg_reg_operand[0])
2992 && REG_P (no_subreg_reg_operand[1])
2996 && REG_P (no_subreg_reg_operand[1])
3003 && REG_P (no_subreg_reg_operand[0])
3308 if (REG_P (new_base_reg))
3314 && REG_P (XEXP (new_base_reg, 0))
3328 if (REG_P (new_index_reg))
3334 && REG_P (XEXP (new_index_reg, 0))
3438 && REG_P (*ad.base_term)
3439 && REG_P (*ad.index_term)
3452 && !(REG_P (*ad.base_term)
3618 if (REG_P (new_reg)
3622 && REG_P (XEXP (SET_SRC (set), 0))
3751 if (! post && REG_P (incloc))
3760 lra_assert (REG_P (result));
3984 lra_assert (REG_P (old));
4246 if (REG_P (reg) && (regno = REGNO (reg)) >= FIRST_PSEUDO_REGISTER)
4326 && REG_P (op)
4351 && goal_alt[i] != NO_REGS && REG_P (op)
4362 || !((REG_P (SET_SRC (curr_insn_set))
4365 && (REG_P (SET_DEST (curr_insn_set))
4373 && REG_P (op))
4379 if (REG_P (op2) && REGNO (op) != REGNO (op2))
4449 if (REG_P (reg)
4564 lra_assert (REG_P (reg));
4569 gcc_assert (REG_P (op) && (int) REGNO (op) >= new_regno_start);
4631 if (REG_P (x))
4722 if (!REG_P (loc))
4787 if (REG_P (x))
4851 return REG_P (SET_SRC (set)) && (int) REGNO (SET_SRC (set)) == regno;
4864 || ! REG_P (SET_DEST (set))
5035 if ((REG_P (dest_reg)
5350 if ((set = single_set (insn)) == NULL_RTX || ! REG_P (SET_DEST (set)))
5353 if (! REG_P (dest))
5448 lra_assert (REG_P (dest));
6002 if (REG_P (x))
6060 lra_assert (REG_P (insn_reg));
6180 && REG_P (SET_DEST (set))
6395 if (curr_set != NULL_RTX && REG_P (SET_DEST (curr_set)))
6397 if (curr_set != NULL_RTX && REG_P (SET_SRC (curr_set)))
6584 if (REG_P (dest))
6689 if ((REG_P (SET_DEST (curr_set))
6693 || (REG_P (SET_SRC (curr_set))
6863 && REG_P (lra_reg_info[regno].restore_rtx))
6874 if (REG_P (reg))
6948 && ! REG_P (lra_reg_info[dregno].restore_rtx))
6961 && ! REG_P (lra_reg_info[sregno].restore_rtx))
7024 && REG_P (SET_DEST (prev_set))
7025 && REG_P (SET_SRC (prev_set))
7154 if (! REG_P (src) || ! REG_P (dest))
7189 if (REG_P (src) && REG_P (dest)
7258 && (! REG_P (lra_reg_info[regno].restore_rtx)