Lines Matching refs:REGNO
169 /* Return hard regno of REGNO or if it is was not assigned to a hard
202 if (! HARD_REGISTER_NUM_P (hard_regno = REGNO (reg)))
214 /* If REGNO is a hard register or has been allocated a hard register,
215 return the class of that register. If REGNO is a reload pseudo
246 REGNO (reg), or NO_REGS if no change in its class was needed. */
255 int regno = REGNO (reg);
265 return TEST_HARD_REG_BIT (reg_class_contents[cl], REGNO (*final_loc));
316 /* Return true if REGNO satisfies a memory constraint. */
472 /* Update equivalence for REGNO. We need to this as the equivalence
498 if (! REG_P (x) || (regno = REGNO (x)) < FIRST_PSEUDO_REGISTER
611 && (int) REGNO (original) >= new_regno_start
619 unsigned int regno = REGNO (original);
646 regno = REGNO (reg);
677 && REGNO (original) == REGNO (curr_insn_input_reloads[i].input)
697 /* Return the offset from REGNO of the least significant register
698 in (reg:MODE REGNO).
773 return REGNO (x) == REGNO (y);
894 if (! REG_P (reg) || (int) REGNO (reg) < new_regno_start)
897 lra_change_class (REGNO (reg), rclass, " Change to", true);
900 /* Searches X for any reference to a reg with the same value as REGNO,
910 if (REG_P (x) && lra_reg_info[REGNO (x)].val == lra_reg_info[regno].val)
932 as REGNO. */
990 if (REG_P (in_rtx) && (int) REGNO (in_rtx) < lra_new_regno_start
991 && find_regno_note (curr_insn, REG_DEAD, REGNO (in_rtx))
993 || check_conflict_input_operands(REGNO (in_rtx), ins)))
994 lra_assign_reg_val (REGNO (in_rtx), REGNO (reg));
1017 && (int) REGNO (subreg_reg) < lra_new_regno_start
1020 && find_regno_note (curr_insn, REG_DEAD, REGNO (subreg_reg))
1022 || check_conflict_input_operands (REGNO (subreg_reg),
1024 lra_assign_reg_val (REGNO (subreg_reg), REGNO (reg));
1065 && (regno_val_use_in (REGNO (in_rtx), other_out_rtx)
1076 && (int) REGNO (in_rtx) < lra_new_regno_start
1077 && find_regno_note (curr_insn, REG_DEAD, REGNO (in_rtx))
1079 || check_conflict_input_operands (REGNO (in_rtx), ins))
1081 || regno_val_use_in (REGNO (in_rtx), out_rtx) == NULL_RTX)
1181 return REG_P (op) ? get_reg_class (REGNO (op)) : NO_REGS;
1237 dclass = get_reg_class (REGNO (dreg));
1249 sclass = get_reg_class (REGNO (sreg));
1273 if (dclass != NO_REGS && lra_get_regno_hard_regno (REGNO (dreg)) < 0)
1275 dregno = REGNO (dreg);
1280 if (sclass != NO_REGS && lra_get_regno_hard_regno (REGNO (sreg)) < 0)
1282 sregno = REGNO (sreg);
1459 regno = REGNO (reg);
1468 REGNO (reg), INSN_UID (curr_insn));
1638 bitmap_set_bit (&lra_subreg_reload_pseudos, REGNO (new_reg));
1657 bitmap_set_bit (&lra_subreg_reload_pseudos, REGNO (new_reg));
1678 else if (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER)
1712 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
1713 && (hard_regno = lra_get_regno_hard_regno (REGNO (reg))) >= 0
1741 bitmap_set_bit (&lra_subreg_reload_pseudos, REGNO (new_reg));
1791 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
1793 && (inner_hard_regno = lra_get_regno_hard_regno (REGNO (reg))) >= 0
1799 && (regclass = lra_get_allocno_class (REGNO (reg)))
1818 bitmap_set_bit (&lra_subreg_reload_pseudos, REGNO (new_reg));
1903 && REGNO (op) >= FIRST_PSEUDO_REGISTER && in_mem_p (REGNO (op)));
1917 return get_reg_class (REGNO (reg)) == NO_REGS;
2044 else if (REGNO (reg) >= FIRST_PSEUDO_REGISTER
2045 || ((int) REGNO (reg)
2046 == lra_get_elimination_hard_regno (REGNO (reg))))
2231 REGNO (op))
2232 || REGNO (op) == REGNO (operand_reg[m])))
2332 REGNO (operand_reg[nop]))
2475 && lra_former_scratch_p (REGNO (operand_reg[nop])));
2624 && (cl = get_reg_class (REGNO (op))) != NO_REGS
2649 && find_regno_note (curr_insn, REG_DEAD, REGNO (op))
2816 if (! (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER))
2901 && REG_P (op) && (cl = get_reg_class (REGNO (op))) != NO_REGS
3454 REGNO (*ad.base_term)) != NULL_RTX)
3632 regno = REGNO (*ad.base_term);
3997 REGNO (old), i, INSN_UID (curr_insn));
4246 if (REG_P (reg) && (regno = REGNO (reg)) >= FIRST_PSEUDO_REGISTER)
4333 && lra_former_scratch_p (REGNO (op)))
4335 int regno = REGNO (op);
4343 (&lra_reg_info[REGNO (op)].insn_bitmap));
4352 && (regno = REGNO (op)) >= FIRST_PSEUDO_REGISTER
4379 if (REG_P (op2) && REGNO (op) != REGNO (op2))
4456 = get_try_hard_regno (REGNO (reg))) >= 0
4507 lra_set_regno_unique_value (REGNO (new_reg));
4565 regno = REGNO (reg);
4569 gcc_assert (REG_P (op) && (int) REGNO (op) >= new_regno_start);
4570 bitmap_set_bit (&lra_optional_reload_pseudos, REGNO (op));
4571 lra_reg_info[REGNO (op)].restore_rtx = reg;
4575 REGNO (op), regno);
4633 int regno = REGNO (x);
4749 /* Return true if REGNO is referenced in more than one block. */
4789 && find_regno_note (insn, REG_DEAD, REGNO (x)) != NULL_RTX);
4820 /* Return true if any init insn of REGNO contains a dying pseudo in
4835 /* Return TRUE if REGNO has a reverse equivalence. The equivalence is
4836 reverse only if we have one init insn with given REGNO as a
4851 return REG_P (SET_SRC (set)) && (int) REGNO (SET_SRC (set)) == regno;
4854 /* Return TRUE if REGNO was reloaded in an equivalence init insn. We
4865 || (int) REGNO (SET_DEST (set)) != regno)
4888 && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
5055 [REGNO (dest_reg)].init_insns)))
5059 [REGNO (SET_SRC (set))].init_insns)))
5296 /* The function is used to form list REGNO usages which consists of
5297 optional debug insns finished by a non-debug insn using REGNO.
5356 cl = get_reg_class (REGNO (dest));
5390 class of ORIGINAL REGNO. */
5452 REGNO (dest), reg_class_names[get_reg_class (REGNO (dest))],
5475 original_regno, REGNO (new_reg));
5489 original_regno, REGNO (new_reg), BLOCK_FOR_INSN (insn)->index);
5490 lra_reg_info[REGNO (new_reg)].restore_rtx = regno_reg_rtx[original_regno];
5491 bitmap_set_bit (&check_only_regs, REGNO (new_reg));
5493 bitmap_set_bit (&lra_inheritance_pseudos, REGNO (new_reg));
5522 original_regno, REGNO (new_reg),
5533 /* Return true if we need a caller save/restore for pseudo REGNO which
5557 /* Return true if we need a split for hard register REGNO or pseudo
5558 REGNO which was assigned to a hard register.
5788 reg_renumber[REGNO (new_reg)] = hard_regno;
5790 int new_regno = REGNO (new_reg);
5886 /* Split a hard reg for reload pseudo REGNO having RCLASS and living
5946 defines or uses REGNO in its insn biggest MODE (we use it only if
5947 REGNO is a hard register). POTENTIAL_RELOAD_HARD_REGS contains
6004 int i, nregs, regno = REGNO (x);
6049 int dst_regno = REGNO (dst_reg);
6061 insn_regno = REGNO (insn_reg);
6075 bitmap_set_bit (&lra_inheritance_pseudos, REGNO (new_reg));
6076 bitmap_set_bit (&check_only_regs, REGNO (new_reg));
6077 lra_reg_info[REGNO (new_reg)].restore_rtx = PATTERN (insn);
6096 REGNO (new_reg), BLOCK_FOR_INSN (insn)->index);
6181 && (regno = REGNO (SET_DEST (set))) >= FIRST_PSEUDO_REGISTER
6247 /* Add inheritance info REGNO and INSNS. Their meaning is described in
6396 dst_regno = REGNO (SET_DEST (curr_set));
6398 src_regno = REGNO (SET_SRC (curr_set));
6566 && (regno = REGNO (cheap)) >= FIRST_PSEUDO_REGISTER
6690 && (regno = REGNO (SET_DEST (curr_set))) >= lra_constraint_new_regno_start
6694 && (regno = REGNO (SET_SRC (curr_set))) >= lra_constraint_new_regno_start
6864 bitmap_set_bit (live, REGNO (lra_reg_info[regno].restore_rtx));
6875 return REGNO (reg);
7026 && (int) REGNO (SET_DEST (prev_set)) == sregno
7027 && ((prev_sregno = REGNO (SET_SRC (prev_set)))
7144 || reg_renumber[REGNO (lra_reg_info[regno].restore_rtx)] >= 0)
7156 if (REGNO (dest) == regno
7158 && REGNO (lra_reg_info[regno].restore_rtx) != REGNO (src)
7160 && (int) REGNO (src) >= new_regno_start
7162 && bitmap_bit_p (&lra_inheritance_pseudos, REGNO (src)))
7190 && ((REGNO (src) == regno
7191 && (REGNO (lra_reg_info[regno].restore_rtx)
7192 == REGNO (dest)))
7193 || (REGNO (dest) == regno
7194 && (REGNO (lra_reg_info[regno].restore_rtx)
7195 == REGNO (src)))))
7203 delete_move_and_clobber (insn, REGNO (dest));
7259 || reg_renumber[REGNO (lra_reg_info[regno].restore_rtx)] < 0))
7272 int restore_regno = REGNO (restore_rtx);