config/tilegx/tilegx.c

196   /* SImode register values are sign-extended to DImode.  */
197   if (mode == SImode && mode_rep == DImode)
774 /* Implement TARGET_SHIFT_TRUNCATION_MASK.  DImode shifts use the mode
781   return mode == DImode ? 63 : 0;
1454    replicating it to fill an interger of mode DImode.  NUM is first
1522 /* Implement DImode rotatert.  */
1583   /* Force the destination to DImode so we can use DImode instructions
1586   subreg = simplify_gen_subreg (DImode, dest_reg, GET_MODE (dest_reg), 0);
1590   temp = create_temp_reg_if_possible (DImode, dest_reg);
1610 			  gen_rtx_ASHIFT (DImode, temp,
1622 			  gen_rtx_LSHIFTRT (DImode, temp,
1637 			      gen_rtx_ROTATE (DImode, temp, GEN_INT (count)));
1694 			  gen_rtx_ASHIFT (DImode, temp, GEN_INT (shift)));
1700 	  rtx temp2 = create_temp_reg_if_possible (DImode, temp);
1702 			  gen_rtx_ASHIFT (DImode, temp, GEN_INT (shift)));
1704 			  gen_rtx_PLUS (DImode, temp2, GEN_INT (leftover)));
1712 	  rtx temp2 = create_temp_reg_if_possible (DImode, temp);
1716 			  gen_rtx_ASHIFT (DImode, temp, shift_count_rtx));
1751 	result = create_temp_reg_if_possible (DImode, dest_reg);
1891 	  emit_insn (gen_zero_extendqidi2 (gen_lowpart (DImode, dest_reg),
1893 	  emit_insn (gen_extendqidi2 (gen_lowpart (DImode, left), mem_left));
1894 	  emit_insn (gen_insv (gen_lowpart (DImode, dest_reg),
1896 			       gen_lowpart (DImode, left)));
1903 	  emit_insn (gen_zero_extendqidi2 (gen_lowpart (DImode, right),
1905 	  emit_insn (gen_zero_extendqidi2 (gen_lowpart (DImode, left),
1907 	  emit_insn (gen_insn_v1int_l (gen_lowpart (DImode, dest_reg),
1908 				       gen_lowpart (DImode, left),
1909 				       gen_lowpart (DImode, right)));
1951   emit_insn (gen_insn_dblalign (gen_lowpart (DImode, wide_result),
1952 				gen_lowpart (DImode, wide_result),
1953 				gen_lowpart (DImode, hi), addr_lo));
1958 	extract_bit_field (gen_lowpart (DImode, wide_result),
1960 			   !sign, gen_lowpart (DImode, dest_reg),
1961 			   DImode, DImode, false, NULL);
1964 	emit_move_insn (dest_reg, gen_lowpart (DImode, extracted));
1992 	  store_val = expand_simple_binop (DImode, LSHIFTRT,
1993 					   gen_lowpart (DImode, src),
2143       rtx out = is_last_op ? result : gen_reg_rtx (DImode);
2160 		      gen_rtx_CONST_INT (DImode, shift_count)));
2206 /* Try to a expand constant multiply in DImode by looking it up in a
2233       HOST_WIDE_INT n = trunc_int_for_mode (INTVAL (op2), DImode);
2240 /* Expand a high multiply pattern in DImode.  RESULT, OP1, OP2 are the
2246   rtx tmp0 = gen_reg_rtx (DImode);
2247   rtx tmp1 = gen_reg_rtx (DImode);
2248   rtx tmp2 = gen_reg_rtx (DImode);
2249   rtx tmp3 = gen_reg_rtx (DImode);
2250   rtx tmp4 = gen_reg_rtx (DImode);
2251   rtx tmp5 = gen_reg_rtx (DImode);
2252   rtx tmp6 = gen_reg_rtx (DImode);
2253   rtx tmp7 = gen_reg_rtx (DImode);
2254   rtx tmp8 = gen_reg_rtx (DImode);
2255   rtx tmp9 = gen_reg_rtx (DImode);
2256   rtx tmp10 = gen_reg_rtx (DImode);
2257   rtx tmp11 = gen_reg_rtx (DImode);
2258   rtx tmp12 = gen_reg_rtx (DImode);
2259   rtx tmp13 = gen_reg_rtx (DImode);
2260   rtx result_lo = gen_reg_rtx (DImode);
2277   emit_move_insn (tmp4, (gen_rtx_ASHIFT (DImode, tmp0, GEN_INT (32))));
2279   emit_move_insn (tmp5, (gen_rtx_ASHIFT (DImode, tmp1, GEN_INT (32))));
2281   emit_move_insn (tmp6, (gen_rtx_PLUS (DImode, tmp4, tmp5)));
2282   emit_move_insn (result_lo, (gen_rtx_PLUS (DImode, tmp2, tmp6)));
2284   emit_move_insn (tmp7, gen_rtx_LTU (DImode, tmp6, tmp4));
2285   emit_move_insn (tmp8, gen_rtx_LTU (DImode, result_lo, tmp2));
2289       emit_move_insn (tmp9, (gen_rtx_ASHIFTRT (DImode, tmp0, GEN_INT (32))));
2290       emit_move_insn (tmp10, (gen_rtx_ASHIFTRT (DImode, tmp1, GEN_INT (32))));
2294       emit_move_insn (tmp9, (gen_rtx_LSHIFTRT (DImode, tmp0, GEN_INT (32))));
2295       emit_move_insn (tmp10, (gen_rtx_LSHIFTRT (DImode, tmp1, GEN_INT (32))));
2298   emit_move_insn (tmp11, (gen_rtx_PLUS (DImode, tmp3, tmp7)));
2299   emit_move_insn (tmp12, (gen_rtx_PLUS (DImode, tmp8, tmp9)));
2300   emit_move_insn (tmp13, (gen_rtx_PLUS (DImode, tmp11, tmp12)));
2301   emit_move_insn (result, (gen_rtx_PLUS (DImode, tmp13, tmp10)));
2337   rtx a = force_reg (DImode, gen_lowpart (DImode, op0));
2338   rtx b = force_reg (DImode, gen_lowpart (DImode, op1));
2340   flags = gen_reg_rtx (DImode);
2363   gcc_assert (GET_MODE (res) == DImode);
2364   emit_move_insn (res, gen_rtx_ZERO_EXTRACT (DImode, flags, GEN_INT (1),
2424   emit_insn (gen_rtx_SET (res, gen_rtx_fmt_ee (code, DImode, op0, op1)));
2449 /* Generate the comparison for a DImode conditional branch.  */
2460       temp = gen_reg_rtx (DImode);
2521 	      && add_operand (GEN_INT (-n), DImode)
2527 	      if (GET_MODE (op0) != DImode)
2529 		  /* Convert to DImode so we can use addli.  Note that
2534 		  rtx temp2 = gen_reg_rtx (DImode);
2540 		  op0 = force_reg (DImode, op0);
2542 	      temp = gen_reg_rtx (DImode);
2543 	      emit_move_insn (temp, gen_rtx_PLUS (DImode, op0, GEN_INT (-n)));
2579   temp = gen_reg_rtx (DImode);
3735   rtx reg = gen_rtx_REG (DImode, regno);
3736   rtx mem = gen_frame_mem (DImode, addr);
3743   rtx reg_note = gen_rtx_REG (DImode, regno_note);
3745   rtx cfa_relative_mem = gen_frame_mem (DImode, cfa_relative_addr);
3759   rtx reg = gen_rtx_REG (DImode, regno);
3760   rtx mem = gen_frame_mem (DImode, addr);
4085       emit_insn (gen_movdi (gen_frame_mem (DImode, chain_addr),
4086 			    gen_rtx_REG (DImode, sp_copy_regno)));
4263       insn = emit_move_insn (gen_lowpart (DImode, hard_frame_pointer_rtx),
4264 			     gen_rtx_REG (DImode, fp_copy_regno));