config/s390/s390.c

1257   return TARGET_64BIT ? DImode : SImode;
1263   return TARGET_64BIT ? DImode : SImode;
1269   return TARGET_64BIT ? DImode : SImode;
1812       && (GET_MODE (*op0) == DImode || GET_MODE (*op0) == SImode)
1825       && (GET_MODE (*op0) == DImode || GET_MODE (*op0) == SImode)
3410 	|| s390_single_part (GEN_INT (value), DImode, SImode, 0) == 1;
3413       return s390_single_part (GEN_INT (value - 1), DImode, SImode, -1) == 1;
3462       mode = DImode;
3620 	  && (mode == SImode || mode == DImode)
3667 	  && (mode == SImode || mode == DImode)
3776       else if (mode == DImode)
3790       if (mode == DImode)
3842 	  && (GET_MODE (XEXP (x, 0)) == SImode || GET_MODE (XEXP (x, 0)) == DImode)
3856 	  && (GET_MODE (XEXP (x, 0)) == SImode || GET_MODE (XEXP (x, 0)) == DImode)
3952 /* Split DImode access register reference REG (on 64-bit) into its constituent
3962   gcc_assert (GET_MODE (reg) == DImode);
4207       machine_mode dword_mode = word_mode == SImode ? DImode : TImode;
4511 	sri->icode = ((mode == DImode) ? CODE_FOR_reloaddi_larl_odd_addend_z10
6176   else if ((GET_MODE (cmp_op0) == DImode || GET_MODE (cmp_op0) == VOIDmode)
6177 	   && (GET_MODE (cmp_op1) == DImode || GET_MODE (cmp_op1) == VOIDmode))
6178     cmp_mode = DImode;
6434       && (mode == DImode || mode == SImode)
6452   if (TARGET_Z10 && (mode == DImode || mode == SImode))
7129       && (mode == SImode || mode == DImode))
7233       && (mode == DImode || mode == SImode)
7237       if (mode == DImode)
7371   /* Make sure not to return DImode for any GPR with -m31 -mzarch.  */
7377     save_mode = DImode;
7825     'N': print the second word of a DImode operand.
7834     'e': "end" contiguous bitmask X in either DImode or vector inner mode.
7842     's': "start" of contiguous bitmask X in either DImode or vector inner mode.
8572   DFmode, DImode, DDmode,
9480 		  if (GET_MODE (SET_SRC (pat)) == DImode
10187    SImode and DImode fit into FPRs as well.
10225 	  if (mode == SImode || mode == DImode)
10759 	    emit_move_insn (gen_rtx_REG (DImode, cfun_gpr_save_slot (i)),
10760 			    gen_rtx_REG (DImode, i));
10791       rtx fpr = gen_rtx_REG (DImode, cfun_gpr_save_slot (i));
10796 	insn = emit_move_insn (gen_rtx_REG (DImode, i), fpr);
10799       add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, i));
13433   return (mode == SImode || (TARGET_64BIT && mode == DImode));
13777 	      && GET_MODE (SET_SRC (tmp_pat)) == DImode
16537   return mode == DImode || mode == SImode ? 63 : 0;