config/mips/mips.c

187        the second operand is a symbolic address.
238      values to compare and the second two arguments are the vector
252      MIPS_BUILTIN_CMP_UPPER: the second register is true.  */
2140 	 In the second case, the assembler will not use R_MIPS_GOT16
4125 	 second operand.  The cost is entirely in the first operand.
5351 /* Return true if CMP1 is a suitable second operand for integer ordering
5382 /* Return true if *CMP1 (of mode MODE) is a valid second operand for
5787       /* Flip the test for the second operand.  */
5990     /* In o32, the second argument is always passed in $f14
6397    likewise MODE2 and OFFSET2 for the second.  MODE is the mode of the
6400    For n32 & n64, $f0 always holds the first value and $f2 the second.
8295    NEWVAL is the optional second operand for the operation.  Its value
9038    'D'	Print the second part of a double-word register or memory operand.
11074 	 looks like we are trying to create a second frame pointer to the
11285      without using a second temporary register.  */
11513    register and the second is the stack slot.  */
12630      possible in the second step without going out of range.  */
13907    OPERANDS[3] is the second operand and may be zero or a register.  */
13966    OPERANDS[3] is the second operand and may be zero or a register.  */
15223      the second scheduling pass.  */
16843       /* We only generate a vector of constants iff the second argument
16881       /* We only generate a vector of constants iff the second argument
18033    otherwise.  If INSN has two call rtx, then store the second one in
18048       /* Calls returning complex values have two CALL rtx.  Look for the second
18577    but it stalls the second instruction if it depends on the first.
18591   rtx_insn *first, *second;
18594   second = SEQ_END (insn);
18596       && NONJUMP_INSN_P (second)
18606 	  && reg_referenced_p (XEXP (cond, 1), PATTERN (second))
18607 	  && !reg_referenced_p (XEXP (cond, 0), PATTERN (second)))
18660 	       when the second instruction is a call:
19117   /* Make a second pass over the instructions.  Delete orphaned
19500 /* We use a machine specific pass to do a second machine dependent reorg
20507   /* We register a second machine specific reorg pass after delay slot
20998      loads if second load clobbers base register.  However, hardware does not