Lines Matching refs:__v8df

203 							   (__v8df)
213 (__v8df)
404 return (__m512d) __builtin_ia32_xorpd512_mask ((__v8df) __A,
405 (__v8df) __B,
406 (__v8df)
416 return (__m512d) __builtin_ia32_xorpd512_mask ((__v8df) __A,
417 (__v8df) __B,
418 (__v8df) __W,
426 return (__m512d) __builtin_ia32_xorpd512_mask ((__v8df) __A,
427 (__v8df) __B,
428 (__v8df)
469 return (__m512d) __builtin_ia32_orpd512_mask ((__v8df) __A,
470 (__v8df) __B,
471 (__v8df)
480 return (__m512d) __builtin_ia32_orpd512_mask ((__v8df) __A,
481 (__v8df) __B,
482 (__v8df) __W,
490 return (__m512d) __builtin_ia32_orpd512_mask ((__v8df) __A,
491 (__v8df) __B,
492 (__v8df)
533 return (__m512d) __builtin_ia32_andpd512_mask ((__v8df) __A,
534 (__v8df) __B,
535 (__v8df)
545 return (__m512d) __builtin_ia32_andpd512_mask ((__v8df) __A,
546 (__v8df) __B,
547 (__v8df) __W,
555 return (__m512d) __builtin_ia32_andpd512_mask ((__v8df) __A,
556 (__v8df) __B,
557 (__v8df)
598 return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A,
599 (__v8df) __B,
600 (__v8df)
610 return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A,
611 (__v8df) __B,
612 (__v8df) __W,
620 return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A,
621 (__v8df) __B,
622 (__v8df)
692 return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A,
703 return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A,
713 return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A,
724 return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A,
735 return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A,
745 return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A,
820 return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
831 return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
841 return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
852 return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A,
863 return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A,
873 return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A,
1013 (__v8df)
1024 (__v8df) __W,
1034 (__v8df)
1045 (__v8df)
1056 (__v8df) __W,
1066 (__v8df)
1091 return (__m512d) __builtin_ia32_rangepd512_mask ((__v8df) __A,
1092 (__v8df) __B, __C,
1093 (__v8df)
1104 return (__m512d) __builtin_ia32_rangepd512_mask ((__v8df) __A,
1105 (__v8df) __B, __C,
1106 (__v8df) __W,
1115 return (__m512d) __builtin_ia32_rangepd512_mask ((__v8df) __A,
1116 (__v8df) __B, __C,
1117 (__v8df)
1395 return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A,
1407 return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A,
1418 return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A,
1429 return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A,
1441 return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A,
1452 return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A,
1531 return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
1543 return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
1554 return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
1565 return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A,
1577 return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A,
1588 return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A,
1736 (__v8df)
1748 (__v8df) __W,
1759 (__v8df)
1770 (__v8df)
1782 (__v8df) __W,
1793 (__v8df)
1803 return (__m512d) __builtin_ia32_reducepd512_mask ((__v8df) __A, __B,
1804 (__v8df)
1813 return (__m512d) __builtin_ia32_reducepd512_mask ((__v8df) __A, __B,
1814 (__v8df) __W,
1822 return (__m512d) __builtin_ia32_reducepd512_mask ((__v8df) __A, __B,
1823 (__v8df)
1895 return (__m128d) __builtin_ia32_extractf64x2_512_mask ((__v8df) __A,
1907 return (__m128d) __builtin_ia32_extractf64x2_512_mask ((__v8df) __A,
1919 return (__m128d) __builtin_ia32_extractf64x2_512_mask ((__v8df) __A,
2002 return (__m512d) __builtin_ia32_rangepd512_mask ((__v8df) __A,
2003 (__v8df) __B, __C,
2004 (__v8df)
2016 return (__m512d) __builtin_ia32_rangepd512_mask ((__v8df) __A,
2017 (__v8df) __B, __C,
2018 (__v8df) __W,
2028 return (__m512d) __builtin_ia32_rangepd512_mask ((__v8df) __A,
2029 (__v8df) __B, __C,
2030 (__v8df)
2191 return (__m512d) __builtin_ia32_insertf64x2_512_mask ((__v8df) __A,
2194 (__v8df)
2204 return (__m512d) __builtin_ia32_insertf64x2_512_mask ((__v8df) __A,
2207 (__v8df) __W,
2217 return (__m512d) __builtin_ia32_insertf64x2_512_mask ((__v8df) __A,
2220 (__v8df)
2231 return (__mmask8) __builtin_ia32_fpclasspd512_mask ((__v8df) __A,
2239 return (__mmask8) __builtin_ia32_fpclasspd512_mask ((__v8df) __A,
2422 ((__m512d)__builtin_ia32_cvtqq2pd512_mask ((__v8di)(A), (__v8df)_mm512_setzero_pd (), -1, (B)))
2428 ((__m512d)__builtin_ia32_cvtqq2pd512_mask ((__v8di)(A), (__v8df)_mm512_setzero_pd (), (U), (B)))
2431 ((__m512d)__builtin_ia32_cvtuqq2pd512_mask ((__v8di)(A), (__v8df)_mm512_setzero_pd (), -1, (B)))
2437 ((__m512d)__builtin_ia32_cvtuqq2pd512_mask ((__v8di)(A), (__v8df)_mm512_setzero_pd (), (U), (B)))
2440 ((__m512d) __builtin_ia32_reducepd512_mask ((__v8df)(__m512d)(A), \
2441 (int)(B), (__v8df)_mm512_setzero_pd (), (__mmask8)-1))
2444 ((__m512d) __builtin_ia32_reducepd512_mask ((__v8df)(__m512d)(A), \
2445 (int)(B), (__v8df)(__m512d)(W), (__mmask8)(U)))
2448 ((__m512d) __builtin_ia32_reducepd512_mask ((__v8df)(__m512d)(A), \
2449 (int)(B), (__v8df)_mm512_setzero_pd (), (__mmask8)(U)))
2476 ((__m128d) __builtin_ia32_extractf64x2_512_mask ((__v8df)(__m512d) (X),\
2480 ((__m128d) __builtin_ia32_extractf64x2_512_mask ((__v8df)(__m512d) (X),\
2484 ((__m128d) __builtin_ia32_extractf64x2_512_mask ((__v8df)(__m512d) (X),\
2512 ((__m512d) __builtin_ia32_rangepd512_mask ((__v8df)(__m512d)(A), \
2513 (__v8df)(__m512d)(B), (int)(C), \
2514 (__v8df)_mm512_setzero_pd (), (__mmask8)-1, _MM_FROUND_CUR_DIRECTION))
2517 ((__m512d) __builtin_ia32_rangepd512_mask ((__v8df)(__m512d)(A), \
2518 (__v8df)(__m512d)(B), (int)(C), \
2519 (__v8df)(__m512d)(W), (__mmask8)(U), _MM_FROUND_CUR_DIRECTION))
2522 ((__m512d) __builtin_ia32_rangepd512_mask ((__v8df)(__m512d)(A), \
2523 (__v8df)(__m512d)(B), (int)(C), \
2524 (__v8df)_mm512_setzero_pd (), (__mmask8)(U), _MM_FROUND_CUR_DIRECTION))
2542 ((__m512d) __builtin_ia32_rangepd512_mask ((__v8df)(__m512d)(A), \
2543 (__v8df)(__m512d)(B), (int)(C), \
2544 (__v8df)_mm512_setzero_pd (), (__mmask8)-1, (R)))
2547 ((__m512d) __builtin_ia32_rangepd512_mask ((__v8df)(__m512d)(A), \
2548 (__v8df)(__m512d)(B), (int)(C), \
2549 (__v8df)(__m512d)(W), (__mmask8)(U), (R)))
2552 ((__m512d) __builtin_ia32_rangepd512_mask ((__v8df)(__m512d)(A), \
2553 (__v8df)(__m512d)(B), (int)(C), \
2554 (__v8df)_mm512_setzero_pd (), (__mmask8)(U), (R)))
2572 ((__m512d) __builtin_ia32_insertf64x2_512_mask ((__v8df)(__m512d) (X),\
2573 (__v2df)(__m128d) (Y), (int) (C), (__v8df)(__m512d) (X), \
2577 ((__m512d) __builtin_ia32_insertf64x2_512_mask ((__v8df)(__m512d) (X),\
2578 (__v2df)(__m128d) (Y), (int) (C), (__v8df)(__m512d) (W), \
2582 ((__m512d) __builtin_ia32_insertf64x2_512_mask ((__v8df)(__m512d) (X),\
2584 (__v8df)(__m512d) _mm512_setzero_pd (), (__mmask8) (U)))
2653 ((__mmask8) __builtin_ia32_fpclasspd512_mask ((__v8df) (__m512d) (X), \
2661 ((__mmask8) __builtin_ia32_fpclasspd512_mask ((__v8df) (__m512d) (X), \