Lines Matching +defs:label +defs:offset
987 /* The register number to be used for the PIC offset register. */
2978 /* If we are not using the default (ARM mode) section anchor offset
2983 Permissible positive offset ranges are 5-bit (for byte loads),
4077 referencing pc adds an offset of 8) the trampoline looks like:
4173 /* The function start address is at offset 8, but in Thumb mode
6016 has an offset of zero. For practical purposes this means
6988 /* On the ARM, the offset starts at 0. */
8008 rtx base, offset;
8040 offset = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
8044 if (CONST_INT_P (offset))
8048 if (!arm_legitimate_index_p (mode, offset, SET, 0))
8051 offset = force_reg (Pmode, offset);
8054 if (CONST_INT_P (offset))
8055 return plus_constant (Pmode, base, INTVAL (offset));
8062 emit_insn (gen_addsi3 (reg, base, offset));
8066 return gen_rtx_PLUS (Pmode, base, offset);
8174 /* We use an UNSPEC rather than a LABEL_REF because this label
8327 /* We use an UNSPEC rather than a LABEL_REF because this label
8367 /* Return TRUE if this rtx is the difference of a symbol and a label,
8482 1) assign a label to register.
8530 HOST_WIDE_INT offset;
8535 offset = INTVAL(addend);
8537 return (offset > -256 && offset < 256);
8539 return (use_ldrd && offset > -1024 && offset < 1024
8540 && (offset & 3) == 0);
8600 /* For quad modes, we restrict the constant offset to be slightly less
8604 (double-mode) offset and so should INDEX+8. */
8736 /* For quad modes, we restrict the constant offset to be slightly less
8740 (double-mode) offset and so should INDEX+8. */
8907 /* REG+const has 5-7 bit offset for non-SP registers. */
8914 /* REG+const has 10-bit offset for SP, but only SImode and
8952 /* Return nonzero if VAL can be used as an offset in a Thumb-state address
9072 rtx label, labelno = NULL_RTX, sum;
9086 label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
9087 label = gen_rtx_CONST (VOIDmode, label);
9090 gen_rtvec (4, x, GEN_INT (reloc), label,
9117 rtx label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
9120 gen_rtx_CONST (VOIDmode, label),
9140 rtx dest, tp, label, labelno, sum, ret, eqv, addend;
9216 label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
9217 label = gen_rtx_CONST (VOIDmode, label);
9219 gen_rtvec (4, x, GEN_INT (TLS_IE32), label,
9410 HOST_WIDE_INT offset = INTVAL (xop1);
9412 /* Try and fold the offset into a biasing of the base register and
9415 if (optimize_size && offset >= 0
9416 && offset < 256 + 31 * GET_MODE_SIZE (mode))
9420 if (offset >= 256)
9421 delta = offset - (256 - GET_MODE_SIZE (mode));
9422 else if (offset < 32 * GET_MODE_SIZE (mode) + 8)
9425 delta = offset & (~31 * GET_MODE_SIZE (mode));
9427 xop0 = force_operand (plus_constant (Pmode, xop0, offset - delta),
9431 else if (offset < 0 && offset > -256)
9545 rtx base, offset;
9546 split_const (x, &base, &offset);
9550 /* Function symbols cannot have an offset due to the Thumb bit. */
9552 && INTVAL (offset) != 0)
9556 && !offset_within_block_p (base, INTVAL (offset)))
13505 /* For quad modes, we restrict the constant offset to be slightly less
13865 /* Don't accept any offset that will require multiple
13872 the offset too large. */
13881 to using an ldm instruction unless the offset is zero and
13900 [(SET (R_d0) (MEM (PLUS (addr) (offset))))
13901 (SET (R_d1) (MEM (PLUS (addr) (offset + <reg_increment>))))
13904 (SET (R_dn) (MEM (PLUS (addr) (offset + n * <reg_increment>))))
13907 1. If offset is 0, first insn should be (SET (R_d0) (MEM (src_addr))).
13920 HOST_WIDE_INT i = 1, base = 0, offset = 0;
13952 /* The offset adjustment must be the number of registers being
13997 offset = INTVAL (XEXP (addr, 1));
14046 offset + (i - base) * reg_increment))
14048 || offset + (i - base) * reg_increment != 0)))
14170 if the offset isn't small enough. The reason 2 ldrs are faster
14180 ldr rd1, [rbase + offset]
14181 ldr rd2, [rbase + offset + 4]
14185 add rd1, rbase, offset
14238 offset must be larger by exactly 4 than the previous one. ORDER[0]
14239 must have been filled in with the lowest offset by the caller.
14258 /* We must find exactly one offset that is higher than the
14280 accesses; *LOAD_OFFSET is set to the first memory location's offset
14312 rtx offset;
14325 offset = const0_rtx;
14334 && (CONST_INT_P (offset
14367 unsorted_offsets[i] = INTVAL (offset);
14378 order[0] has been set to the lowest offset in the list. Sort
14428 to the first memory location's offset from that base register. REGS is an
14466 rtx offset;
14479 offset = const0_rtx;
14488 && (CONST_INT_P (offset
14516 unsorted_offsets[i] = INTVAL (offset);
14527 order[0] has been set to the lowest offset in the list. Sort
14684 OFFSETP is used to pass an offset to and from this function; this offset
14686 appropriate offset in its address), it is used only for setting
14694 HOST_WIDE_INT offset = *offsetp;
14705 mems[i] = adjust_automodify_address_nv (basemem, SImode, addr, offset);
14706 offset += 4;
14710 *offsetp = offset;
14750 HOST_WIDE_INT offset;
14756 &base_reg, &offset, !sort_regs);
14790 emit_insn (gen_addsi3 (newbase, base_reg_rtx, GEN_INT (offset)));
14791 offset = 0;
14797 addr = plus_constant (Pmode, base_reg_rtx, offset + i * 4);
14802 write_back ? offset + i * 4 : 0));
14819 HOST_WIDE_INT offset;
14826 mem_order, &base_reg, &offset, true);
14843 emit_insn (gen_addsi3 (base_reg_rtx, base_reg_rtx, GEN_INT (offset)));
14844 offset = 0;
14847 addr = plus_constant (Pmode, base_reg_rtx, offset);
14851 addr = plus_constant (Pmode, base_reg_rtx, offset + i * 4);
14856 write_back ? offset + i * 4 : 0));
14876 HOST_WIDE_INT offset;
14885 mem_order, &base_reg, &offset, false);
14959 emit_insn (gen_addsi3 (base_reg_rtx, base_reg_rtx, GEN_INT (offset)));
14960 offset = 0;
14963 addr = plus_constant (Pmode, base_reg_rtx, offset);
14967 addr = plus_constant (Pmode, base_reg_rtx, offset + i * 4);
14972 write_back ? offset + i * 4 : 0));
15018 For copying the last bytes we want to subtract this offset again. */
15250 rtx_code_label *label = gen_label_rtx ();
15251 emit_label (label);
15263 emit_jump_insn (gen_cbranchsi4 (test, src_reg, final_src, label));
15466 HOST_WIDE_INT offset = GET_MODE_SIZE (mode);
15467 rtx addr = plus_constant (Pmode, XEXP (mem, 0), offset);
15469 return adjust_automodify_address (mem, mode, addr, offset);
16246 HOST_WIDE_INT offset = 0;
16250 offset = SUBREG_BYTE (ref);
16283 /* Handle the case where the address is too complex to be offset by 1. */
16297 offset += INTVAL (XEXP (base, 1));
16302 lo = (offset >= 0
16303 ? (offset & 0xfff)
16304 : -((-offset) & 0xfff));
16306 /* Corner case, if lo is the max offset then we would be out of range
16312 hi = ((((offset - lo) & (HOST_WIDE_INT) 0xffffffff)
16316 gcc_assert (hi + lo == offset);
16326 offset = lo;
16341 offset))));
16345 offset + 1))));
16374 HOST_WIDE_INT offset = 0;
16378 offset = SUBREG_BYTE (ref);
16426 /* Handle the case where the address is too complex to be offset by 1. */
16462 offset += INTVAL (XEXP (base, 1));
16467 lo = (offset >= 0
16468 ? (offset & 0xfff)
16469 : -((-offset) & 0xfff));
16471 /* Corner case, if lo is the max offset then we would be out of range
16477 hi = ((((offset - lo) & (HOST_WIDE_INT) 0xffffffff)
16481 gcc_assert (hi + lo == offset);
16513 offset = lo;
16521 offset + 1)),
16527 offset)),
16533 offset)),
16540 offset + 1)),
16612 offset_ok_for_ldrd_strd (HOST_WIDE_INT offset)
16617 if (TARGET_THUMB2 && ((offset & 3) != 0))
16627 return ((offset <= max_offset) && (offset >= -max_offset));
16638 operands_ok_ldrd_strd (rtx rt, rtx rt2, rtx rn, HOST_WIDE_INT offset,
16646 if (!offset_ok_for_ldrd_strd (offset))
16670 /* PC can be used as base register (for offset addressing only),
16679 constant offset OFFSET from the base pointer is permitted on this
16682 align_ok_ldrd_strd (HOST_WIDE_INT align, HOST_WIDE_INT offset)
16685 ? (align >= BITS_PER_WORD && (offset & 3) == 0)
16686 : (align >= 2 * BITS_PER_WORD && (offset & 7) == 0));
16690 operand MEM's address contains an immediate offset from the base
16694 mem_ok_for_ldrd_strd (rtx mem, rtx *base, rtx *offset, HOST_WIDE_INT *align)
16698 gcc_assert (base != NULL && offset != NULL);
16712 *offset = const0_rtx;
16730 *offset = XEXP (addr, 1);
16731 return (REG_P (*base) && CONST_INT_P (*offset));
16754 HOST_WIDE_INT offsets[2], offset, align[2];
16876 offset = offsets[1];
16888 offset = offsets[0];
16895 if (!align_ok_ldrd_strd (align[0], offset))
16899 if (operands_ok_ldrd_strd (operands[0], operands[1], base, offset,
16912 if (operands_ok_ldrd_strd (operands[0], operands[1], base, offset,
16937 if (operands_ok_ldrd_strd (operands[1], operands[0], base, offset,
16964 base, offset,
16982 HOST_WIDE_INT offsets[2], offset, align[2];
17010 offset = offsets[0];
17016 if (!align_ok_ldrd_strd (align[0], offset))
17019 return operands_ok_ldrd_strd (operands[0], operands[1], base, offset,
17133 able to reach and the offset of the instruction into the function.
17164 /* The maximum offset into the code that this entry can be placed. While
17174 /* The offset from the start of the minipool. */
17175 HOST_WIDE_INT offset;
17280 label LABEL. */
17282 get_label_padding (rtx label)
17286 align = 1 << label_to_alignment (label).levels[0].log;
17469 HOST_WIDE_INT offset;
17504 offset = 0;
17507 mp->offset = offset;
17509 offset += mp->fix_size;
17560 + minipool_vector_tail->offset
17583 < minipool_barrier->address + mp->offset + fix->fix_size)
17653 mp->offset = 0;
17662 mp->next->offset = mp->offset + mp->fix_size;
17664 mp->next->offset = mp->offset;
17675 HOST_WIDE_INT offset = 0;
17682 mp->offset = offset;
17685 offset += mp->fix_size;
17722 (unsigned) mp->offset, (unsigned long) mp->min_address,
17792 /* It will always be better to place the table before the label, rather
17825 rtx_code_label *label = gen_label_rtx ();
17886 from = emit_jump_insn_after (gen_jump (label), selected);
17887 JUMP_LABEL (from) = label;
17889 emit_label_after (label, barrier);
17921 minipool. ADDRESS is the offset of the insn since the start of the
18173 long int offset, size;
18179 /* The offset within a structure is always an offset from
18181 calculation of the register based offset that we use here. */
18182 offset = starting_bit;
18183 offset += TREE_INT_CST_ELT (DECL_FIELD_BIT_OFFSET (field), 0);
18184 offset %= 32;
18190 if (*last_used_bit != offset)
18192 if (offset < *last_used_bit)
18194 /* This field's offset is before the 'last_used_bit', that
18212 mask = ((uint32_t)-1) >> (32 - offset);
18216 current_bit = offset;
18225 padding_bits_to_clear, offset,
19357 this_fix->minipool->offset);
19398 int offset;
19405 offset = 0;
19406 offset += update ? 1 : 0;
19407 offset += return_pc ? 1 : 0;
19410 for (i = offset; i < num_saves; i++)
19444 reg_names[REGNO (XEXP (XVECEXP (operands[0], 0, offset), 0))]);
19447 for (i = offset + 1; i < num_saves; i++)
20542 /* Return nonzero if the offset in the address is an immediate. Otherwise,
21452 extra function label for each function with the 'cmse_nonsecure_entry'
21453 attribute. This extra function label should be prepended with
21595 rtx label = cfun->machine->call_via[regno];
21597 if (label != NULL)
21601 CODE_LABEL_NUMBER (label));
21784 post-addressing mode. All other stores use offset addressing. If no STRD
21793 int offset = 0;
21819 offset = - 4 * num_regs;
21829 if (offset < 0)
21832 tmp = plus_constant (Pmode, stack_pointer_rtx, offset);
21835 offset = 0;
21837 else if (offset > 0)
21841 offset));
21857 offset));
21865 offset + 4));
21870 offset += 8;
21876 if (offset < 0)
21879 tmp = plus_constant (Pmode, stack_pointer_rtx, offset);
21882 offset = 0;
21884 else if (offset > 0)
21888 offset));
21904 offset));
21909 offset += 4;
22065 SIZE is the offset to be adjusted.
22387 offset addressing and then generates one separate stack udpate. This provides
22393 peephole optimization to merge the load at stack-offset zero
22400 int offset = 0;
22418 if (offset > 0)
22422 offset));
22441 offset += 8;
22447 if (offset > 0)
22451 offset));
22464 offset += 4;
22474 if (offset > 0)
22479 offset));
22481 arm_add_cfa_adjust_cfa_note (tmp, offset,
22483 offset = 0;
22654 into an offset once we have determined the size of preceding data. */
24269 HOST_WIDE_INT offset = INTVAL (index);
24270 asm_fprintf (stream, "[%r, #%wd]", REGNO (base), offset);
24405 HOST_WIDE_INT offset = 0;
24417 offset = INTVAL (index);
24419 offset = -offset;
24421 REGNO (base), offset);
24685 0 -> 1 final_prescan_insn if the `target' is a label
24689 3 -> 0 (*targetm.asm_out.internal_label) if the `target' label is reached
24690 (the target label has CODE_LABEL_NUMBER equal to arm_target_label).
24940 /* Jumping into the middle of an IT block is illegal, so a label or
25011 unconditional branch to a label, and immediately following this branch
25012 is the previous target label which is only used once, and the label this
25069 rtx label = 0;
25075 label = XEXP (SET_SRC (body), 0);
25078 label = XEXP (XEXP (SET_SRC (body), 1), 0);
25081 label = XEXP (XEXP (SET_SRC (body), 2), 0);
25099 insns are okay, and the label or unconditional branch to the same
25100 label is not too far away, succeed. */
25113 /* Succeed if it is the target label, otherwise fail since
25115 if (this_insn == label)
25125 /* Succeed if the following insn is the target label.
25130 if (this_insn && this_insn == label)
25150 /* Succeed if the following insn is the target label, or
25152 target label. */
25157 if (this_insn && this_insn == label
25168 /* If this is an unconditional branch to the same label, succeed.
25169 If it is to another label, do nothing. If it is conditional,
25179 && XEXP (SET_SRC (scanbody), 0) == label && !reverse)
25231 arm_target_label = CODE_LABEL_NUMBER (label);
25468 /* Handle a special case when computing the offset
25475 /* We are only interested if dbxout_parms() failed to compute the offset. */
25484 an offset of 0 is correct. */
25489 argument, then an offset of 0 is correct. */
25497 offset from the frame pointer. Since GDB only understands
25499 held in the register into an offset from the frame pointer.
25502 register is initialized from the frame pointer plus an offset
25511 an offset of 0 from the frame pointer, rather than 8. */
26303 Thumb1 long branch offset is -2048 to 2046. The worst case is each
26636 /* Like arm_compute_initial_elimination offset. Simpler because there
26761 HOST_WIDE_INT offset = 0;
26799 offset = bit_count (l_mask) * UNITS_PER_WORD;
26802 x = GEN_INT (offset + 16 + crtl->args.pretend_args_size);
26805 x = plus_constant (Pmode, stack_pointer_rtx, offset + 4);
26819 x = plus_constant (Pmode, stack_pointer_rtx, offset + 12);
26825 x = plus_constant (Pmode, stack_pointer_rtx, offset);
26833 x = plus_constant (Pmode, stack_pointer_rtx, offset);
26840 x = plus_constant (Pmode, stack_pointer_rtx, offset + 12);
26848 x = plus_constant (Pmode, stack_pointer_rtx, offset + 8);
26852 x = GEN_INT (offset + 12);
27267 /* Find the offset of the floating-point save area in the frame. */
27286 /* The offset is from IP_REGNUM. */
27740 /* Generate a label, so that the debugger will notice the
27741 change in instruction sets. This label is also used by
27769 rtx offset;
27810 base = arg2, offset = arg1;
27812 base = arg1, offset = arg2;
27817 if (REG_P (offset))
27819 int reg_offset = REGNO (offset);
27823 /* Add the base and offset registers together into the
27945 HOST_WIDE_INT offset = 0;
27965 offset += 4;
27973 offset))));
27975 offset)),
27978 offset += 2;
27986 offset))));
27988 offset)),
28320 rtx label = thumb_call_via_label[regno];
28322 if (label != 0)
28325 CODE_LABEL_NUMBER (label));
28368 char label[256];
28383 ASM_GENERATE_INTERNAL_LABEL (label, "LTHUMBFUNC", labelno);
28421 assemble_name (file, label);
28459 assemble_name (file, label);
28497 assemble_name (file, label);
28504 pipeline offset is four rather than eight. Adjust the offset
28669 rtx offset;
28676 || !CONST_INT_P (offset = XEXP (sum, 1))
28677 || ((INTVAL (offset) < 1024) && (INTVAL (offset) > -1024)))
29203 HOST_WIDE_INT offset;
29220 offset = -INTVAL (XEXP (SET_SRC (e), 1));
29239 padlast = offset - INTVAL (XEXP (e, 1)) - 4;
29241 padlast = offset - 4;
29259 gcc_assert (offset == padfirst + nregs * reg_size + padlast);
29261 offset = padfirst;
29293 && offset == INTVAL (XEXP (e, 1)));
29298 offset += reg_size;
29349 HOST_WIDE_INT offset;
29357 offset = INTVAL (XEXP (e1, 1));
29360 offset);
29381 /* Set reg to offset from sp. */
29640 char label[256];
29643 ASM_GENERATE_INTERNAL_LABEL (label, "LPIC", labelno);
29644 assemble_name_raw (fp, label);
30650 rtx_code_label *label;
30668 label = gen_label_rtx ();
30669 emit_label (label);
30753 emit_unlikely_jump (gen_cbranchsi4 (x, cond, const0_rtx, label));
31122 rtx offset;
31161 offset = GEN_INT (location);
31166 emit_insn (gen_neon_vext (d->vmode, d->target, d->op0, d->op1, offset));
31804 unsigned int offset = 0;
31825 mem = adjust_automodify_address (dstbase, mode, dst, offset);
31841 offset += nelt_mode;
31842 mem = adjust_automodify_address (dstbase, mode, dst, offset);
31854 offset += length - i;
31855 mem = adjust_automodify_address (dstbase, mode, dst, offset);
31871 offset += (length - i) + (nelt_mode - nelt_v8);
31872 mem = adjust_automodify_address (dstbase, V8QImode, dst, offset);
31898 unsigned int offset = 0;
31925 mem = adjust_automodify_address (dstbase, mode, dst, offset);
31932 offset += length - nelt_mode;
31933 mem = adjust_automodify_address (dstbase, mode, dst, offset);
31955 mem = adjust_automodify_address (dstbase, mode, addr, offset + i);
31967 offset += i - UNITS_PER_WORD;
31968 mem = adjust_automodify_address (dstbase, mode, addr, offset);
31980 offset += length - nelt_mode;
31981 mem = adjust_automodify_address (dstbase, mode, dst, offset);
32825 /* If MEM is in the form of [base+offset], extract the two parts
32830 extract_base_offset_in_addr (rtx mem, rtx *base, rtx *offset)
32845 *offset = const0_rtx;
32854 *offset = XEXP (addr, 1);
32859 *offset = NULL_RTX;
32864 /* If INSN is a load or store of address in the form of [base+offset],
32870 fusion_load_store (rtx_insn *insn, rtx *base, rtx *offset, bool *is_load)
32884 extract_base_offset_in_addr (dest, base, offset);
32889 extract_base_offset_in_addr (src, base, offset);
32894 return (*base != NULL_RTX && *offset != NULL_RTX);
32912 rtx base, offset;
32917 if (!fusion_load_store (insn, &base, &offset, &is_load))
32935 /* INSN with smaller offset goes first. */
32936 off_val = (int)(INTVAL (offset));
33267 /* Or registers with an offset. */
33273 /* The offset must be an immediate though. */
33566 the asm label of the final jump destination.
33567 dest: is a string which is used to generate the asm label of the intermediate