Lines Matching defs:tmpl
8202 struct rsrc tmpl;
8210 tmpl.dependency = dep;
8211 tmpl.note = note;
8212 tmpl.insn_srlz = tmpl.data_srlz = 0;
8213 tmpl.qp_regno = CURR_SLOT.qp_regno;
8214 tmpl.link_to_qp_branch = 1;
8215 tmpl.mem_offset.hint = 0;
8216 tmpl.mem_offset.offset = 0;
8217 tmpl.mem_offset.base = 0;
8218 tmpl.specific = 1;
8219 tmpl.index = -1;
8220 tmpl.cmp_type = CMP_NONE;
8221 tmpl.depind = 0;
8222 tmpl.file = NULL;
8223 tmpl.line = 0;
8224 tmpl.path = 0;
8245 specs[count] = tmpl;
8254 specs[count] = tmpl;
8271 specs[count++] = tmpl;
8283 specs[count] = tmpl;
8314 specs[count] = tmpl;
8334 specs[count] = tmpl;
8343 specs[count] = tmpl;
8348 specs[count] = tmpl;
8371 specs[count] = tmpl;
8382 specs[count] = tmpl;
8399 specs[count] = tmpl;
8404 specs[count] = tmpl;
8424 specs[count] = tmpl;
8429 specs[count] = tmpl;
8436 specs[count] = tmpl;
8454 specs[count] = tmpl;
8459 specs[count] = tmpl;
8475 specs[count] = tmpl;
8495 specs[count] = tmpl;
8504 specs[count] = tmpl;
8511 specs[count] = tmpl;
8519 specs[count] = tmpl;
8537 specs[count] = tmpl;
8542 specs[count] = tmpl;
8562 specs[count] = tmpl;
8567 specs[count] = tmpl;
8587 specs[count] = tmpl;
8592 specs[count] = tmpl;
8599 specs[count] = tmpl;
8619 specs[count] = tmpl;
8631 specs[count] = tmpl;
8652 specs[count] = tmpl;
8669 specs[count] = tmpl;
8680 specs[count] = tmpl;
8696 specs[count] = tmpl;
8718 specs[count] = tmpl;
8730 specs[count] = tmpl;
8743 specs[count] = tmpl;
8755 specs[count] = tmpl;
8763 specs[count] = tmpl;
8790 specs[count] = tmpl;
8810 specs[count] = tmpl;
8824 specs[count] = tmpl;
8845 specs[count] = tmpl;
8860 specs[count] = tmpl;
8877 specs[count] = tmpl;
8886 specs[count] = tmpl;
8896 specs[count] = tmpl;
8903 specs[count] = tmpl;
8922 specs[count] = tmpl;
8937 specs[count] = tmpl;
8946 specs[count] = tmpl;
8967 specs[count] = tmpl;
8982 specs[count] = tmpl;
8999 specs[count] = tmpl;
9008 specs[count] = tmpl;
9018 specs[count] = tmpl;
9025 specs[count] = tmpl;
9046 specs[count++] = tmpl;
9056 specs[count++] = tmpl;
9066 specs[count++] = tmpl;
9075 specs[count++] = tmpl;
9080 specs[count++] = tmpl;
9109 specs[count++] = tmpl;
9118 specs[count++] = tmpl;
9139 specs[count++] = tmpl;
9144 specs[count++] = tmpl;
9164 specs[count++] = tmpl;
9182 specs[count++] = tmpl;
9200 specs[count++] = tmpl;
9216 specs[count++] = tmpl;
9233 specs[count++] = tmpl;
9238 specs[count++] = tmpl;
9250 specs[count++] = tmpl;
9265 specs[count++] = tmpl;
9273 specs[count++] = tmpl;
9289 specs[count++] = tmpl;
9296 specs[count++] = tmpl;
9315 specs[count++] = tmpl;
9326 specs[count++] = tmpl;
9333 specs[count++] = tmpl;
9349 specs[count++] = tmpl;
9356 specs[count++] = tmpl;
9367 specs[count++] = tmpl;
9386 specs[count] = tmpl;
9398 specs[count] = tmpl;
9408 specs[count] = tmpl;
9415 specs[count] = tmpl;
9426 specs[count++] = tmpl;
9434 specs[count++] = tmpl;
9443 specs[count++] = tmpl;
9450 specs[count++] = tmpl;
9466 specs[count] = tmpl;
9474 specs[count] = tmpl;
9483 specs[count++] = tmpl;
9504 specs[count++] = tmpl;
9514 specs[count++] = tmpl;
9523 specs[count++] = tmpl;
9530 specs[count++] = tmpl;
9536 specs[count++] = tmpl;