Lines Matching defs:register_specifier

219   const reg_entry *register_specifier;
3783 unsigned int register_specifier;
3788 if (i.vex.register_specifier)
3790 register_specifier =
3791 ~register_number (i.vex.register_specifier) & 0xf;
3792 gas_assert ((i.vex.register_specifier->reg_flags & RegVRex) == 0);
3795 register_specifier = 0xf;
3838 && i.vex.register_specifier
3839 && !(i.vex.register_specifier->reg_flags & RegRex))
3853 i.rm.regmem = ~register_specifier & 0xf;
3855 i.vex.register_specifier += xchg - i.rm.regmem;
3856 register_specifier = ~xchg & 0xf;
3905 | register_specifier << 3
3938 | register_specifier << 3
3955 || (i.vex.register_specifier
3956 && (i.vex.register_specifier->reg_flags & RegRex2));
4041 unsigned int register_specifier, w;
4045 if (i.vex.register_specifier)
4049 register_specifier = i.vex.register_specifier->reg_num;
4050 if ((i.vex.register_specifier->reg_flags & RegRex))
4051 register_specifier += 8;
4054 if (!(i.vex.register_specifier->reg_flags & RegVRex))
4056 register_specifier = ~register_specifier & 0xf;
4060 register_specifier = 0xf;
4116 | (register_specifier << 3)
4253 if (i.vex.register_specifier
4254 && i.vex.register_specifier->reg_flags & RegRex2)
4259 if (i.vex.register_specifier && i.tm.opcode_space == SPACE_EVEXMAP4)
9880 else if (do_sse2avx && (i.rex & rex_bit) && i.vex.register_specifier)
9882 gas_assert (i.vex.register_specifier == r);
9883 i.vex.register_specifier += 8;
10146 i.vex.register_specifier = i.op[i.operands - 1].regs;
10156 i.vex.register_specifier = i.op[i.operands - 1].regs;
10298 i.vex.register_specifier = i.op[v].regs;