Lines Matching defs:reg_operands

271     unsigned int reg_operands, disp_operands, mem_operands, imm_operands;
3550 if (i.reg_operands > 1
3553 && i.operands == i.reg_operands
3586 if (i.reg_operands >= 3
3588 && i.reg_operands == i.operands - i.imm_operands
3596 unsigned int xchg = i.operands - i.reg_operands;
3838 if ((i.reg_operands + i.imm_operands) == i.operands)
4200 i.reg_operands = 2;
4212 && i.reg_operands == 1
4245 && i.reg_operands == 1
4263 && ((i.reg_operands == 2
4267 || (i.reg_operands == 1
4310 && i.reg_operands == 2
4331 else if (i.reg_operands == 3
4484 if (i.reg_operands == 3 && i.tm.base_opcode != 0xdf)
4724 if (i.reg_operands == 1)
5090 i.reg_operands--;
5726 else if (i.reg_operands)
6039 gas_assert (i.reg_operands == 2 || i.mask.reg);
6040 if (i.reg_operands == 2 && !i.mask.reg)
6064 else if (i.reg_operands == 1 && i.mask.reg)
6086 if (i.reg_operands == 3
6106 || (i.reg_operands > 2
6687 if (t->opcode_modifier.d && i.reg_operands == i.operands
7023 else if (i.reg_operands
7329 if (!i.tm.opcode_modifier.modrm && i.reg_operands && i.tm.operands < 3)
7399 && (!i.reg_operands
7400 || (i.reg_operands == 1
7415 gas_assert (i.reg_operands);
7447 && i.reg_operands == 1
7813 gas_assert (i.reg_operands
7863 i.reg_operands += 2;
7877 i.reg_operands++;
7907 i.reg_operands--;
7940 gas_assert (i.reg_operands == 1
7945 i.reg_operands++;
8088 gas_assert ((i.reg_operands == 4
8089 || (i.reg_operands == 3 && i.mem_operands == 1))
8142 /* i.reg_operands MUST be the number of real register operands;
8149 && ((i.reg_operands == 2
8151 || (i.reg_operands == 3
8153 || (i.reg_operands == 4 && vex_3_sources)))
8571 else if (i.reg_operands)
11506 i.reg_operands++;
11511 && i.reg_operands == 1)
11549 if (i.mem_operands || i.reg_operands + i.imm_operands > 1
11550 || (i.reg_operands == 1