dist/opcodes/tic6x-dis.c

551 	      unsigned int fld_val;
562 	      fld_val = tic6x_field_bits (opcode, field);
574 		  func_unit_side = (fld_val ? 2 : 1);
585 		  func_unit_data_side = (fld_val ? 2 : 1);
598 		  func_unit_cross = fld_val;
604                   t_val = fld_val;
818 	      unsigned int fld_val;
831               fld_val = tic6x_field_bits (opcode, field);
835                   (fld_val == 0x00) && (fld_val = 0x10);
836                   (fld_val == 0x07) && (fld_val = 0x08);
848 		      snprintf (operands[op_num], 24, "%u", fld_val);
852 		      mem_offset = fld_val;
864 		  snprintf (operands[op_num], 24, "%u", fld_val << 16);
869                   if (fld_val == 0)
875 		      signed_fld_val = (signed int) fld_val;
884 		  signed_fld_val = (signed int) fld_val;
892 		  snprintf (operands[op_num], 24, "%u", fld_val + 1);
897 		  signed_fld_val = (signed int) fld_val;
914 			    (func_unit_side == 2 ? 'b' : 'a'), (fld_val | 0x1),
915 			    (func_unit_side == 2 ? 'b' : 'a'), (fld_val | 0x1) - 1);
920 		  operands_addresses[op_num] = fp_addr + 2 * fld_val;
924 		  fld_val <<= 1;
941 		      snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val);
947 		      snprintf (operands[op_num], 24, "%c%u", reg_side,  reg_base + fld_val);
953 		      snprintf (operands[op_num], 24, "%c%u", reg_side, fld_val);
958 		      snprintf (operands[op_num], 24, "b%u", reg_base + fld_val);
963 		      snprintf (operands[op_num], 24, "b%u", fld_val);
969 		      snprintf (operands[op_num], 24, "%c%u", reg_side,  reg_base + fld_val);
975 		      snprintf (operands[op_num], 24, "%c%u", reg_side,  reg_base + fld_val);
980 		      if (fld_val & 1)
984                                 reg_side, reg_base + fld_val + 1,
985 				reg_side, reg_base + fld_val);
990 		      if (fld_val & 1)
994 				reg_side, reg_base + fld_val + 1,
995 				reg_side, reg_base + fld_val);
1005 		      if (fld_val & 1)
1009 				reg_side, reg_base + fld_val + 1,
1010 				reg_side, reg_base + fld_val);
1015 		      if (fld_val & 1)
1019 				reg_side, reg_base + fld_val + 1,
1020 				reg_side, reg_base + fld_val);
1026 		      snprintf (operands[op_num], 24, "*%c%u", reg_side, reg_base + fld_val);
1031 		      mem_base_reg = fld_val;
1047                       if (fld_val > 0x3u)
1050 				 opcode, op_num, fld_val);
1053 		      mem_base_reg = 0x4 | fld_val;
1070 				fld_val ? 15u : 14u);
1074 		      mem_base_reg = fld_val ? 15u : 14u;
1086 		  fld_val += 1;
1090 		  mem_offset = fld_val;
1110 		  mem_mode = fld_val;
1115 		  mem_scaled = fld_val;
1120 		  crlo = fld_val;
1125 		  crhi = fld_val;
1267 			t = (t << 1) | ((fld_val >> i) & 1);
1275 				fld_val & ((1 << fcyc_bits) - 1));
1280 		  if (fld_val == 0)
1290 			if (fld_val & (1 << i))