Lines Matching refs:NFP_3200_CPPTGT_QDR
359 {NFP_3200_CPPTGT_QDR, 0, 0, 0, 0, "read"},
360 {NFP_3200_CPPTGT_QDR, 1, 0, 0, 0, "write"},
361 {NFP_3200_CPPTGT_QDR, 2, 0, 0, 0, "write_atomic"},
362 {NFP_3200_CPPTGT_QDR, 2, 1, 0, 0, "swap"},
363 {NFP_3200_CPPTGT_QDR, 3, 0, 0, 0, "set"},
364 {NFP_3200_CPPTGT_QDR, 3, 1, 0, 0, "test_and_set"},
365 {NFP_3200_CPPTGT_QDR, 4, 0, 0, 0, "clr"},
366 {NFP_3200_CPPTGT_QDR, 4, 1, 0, 0, "test_and_clr"},
367 {NFP_3200_CPPTGT_QDR, 5, 0, 0, 0, "add"},
368 {NFP_3200_CPPTGT_QDR, 5, 1, 0, 0, "test_and_add"},
369 {NFP_3200_CPPTGT_QDR, 6, 0, 0, 0, "read_queue"},
370 {NFP_3200_CPPTGT_QDR, 6, 1, 0, 0, "read_queue_ring"},
371 {NFP_3200_CPPTGT_QDR, 6, 2, 0, 0, "write_queue"},
372 {NFP_3200_CPPTGT_QDR, 6, 3, 0, 0, "write_queue_ring"},
373 {NFP_3200_CPPTGT_QDR, 7, 0, 0, 0, "incr"},
374 {NFP_3200_CPPTGT_QDR, 7, 1, 0, 0, "test_and_incr"},
375 {NFP_3200_CPPTGT_QDR, 8, 0, 0, 0, "decr"},
376 {NFP_3200_CPPTGT_QDR, 8, 1, 0, 0, "test_and_decr"},
377 {NFP_3200_CPPTGT_QDR, 9, 0, 0, 0, "put"},
378 {NFP_3200_CPPTGT_QDR, 9, 1, 0, 0, "get"},
379 {NFP_3200_CPPTGT_QDR, 9, 2, 0, 0, "put_imm"},
380 {NFP_3200_CPPTGT_QDR, 9, 3, 0, 0, "pop"},
381 {NFP_3200_CPPTGT_QDR, 10, 0, 0, 0, "journal"},
382 {NFP_3200_CPPTGT_QDR, 10, 1, 0, 0, "fast_journal"},
383 {NFP_3200_CPPTGT_QDR, 11, 0, 0, 0, "dequeue"},
384 {NFP_3200_CPPTGT_QDR, 12, 0, 0, 0, "enqueue"},
385 {NFP_3200_CPPTGT_QDR, 12, 1, 0, 0, "enueue_tail"},
386 {NFP_3200_CPPTGT_QDR, 12, 2, 0, 0, "nfp_enqueue"},
387 {NFP_3200_CPPTGT_QDR, 12, 3, 0, 0, "nfp_enueue_tail"},
388 {NFP_3200_CPPTGT_QDR, 13, 0, 0, 0, "csr_wr"},
389 {NFP_3200_CPPTGT_QDR, 13, 1, 0, 0, "csr_rd"},
390 {NFP_3200_CPPTGT_QDR, 14, 0, 0, 0, "wr_qdesc"},
391 {NFP_3200_CPPTGT_QDR, 14, 1, 0, 0, "nfp_wr_qdesc"},
392 {NFP_3200_CPPTGT_QDR, 14, 2, 0, 0, "wr_qdesc_count"},
393 {NFP_3200_CPPTGT_QDR, 14, 3, 0, 0, "push_qdesc"},
394 {NFP_3200_CPPTGT_QDR, 15, 0, 0, 0, "rd_qdesc_other"},
395 {NFP_3200_CPPTGT_QDR, 15, 1, 0, 0, "rd_qdesc_tail"},
396 {NFP_3200_CPPTGT_QDR, 15, 2, 0, 0, "rd_qdesc_head"},
397 {NFP_3200_CPPTGT_QDR, 15, 3, 0, 0, "nfp_rd_qdesc"},
2036 cpp_target = NFP_3200_CPPTGT_QDR; /* A.k.a. SRAM. */