dist/opcodes/mips-opc.c

362    read accumulators (that may be $ac0), we add WR_a (WR_HILO) or RD_a
380 #define RD_a	RD_HILO	/* Read dsp accumulators (reuse RD_HILO)  */
381 #define MOD_a	WR_a|RD_a
1401 {"mftacx",		"d",		0x41020021, 0xffff07ff, WR_1|RD_a|TRAP,		0,		0,		MT32,	0 },
1402 {"mftacx",		"d,*",		0x41020021, 0xfff307ff, WR_1|RD_a|TRAP,		0,		0,		MT32,	0 },
1413 {"mfthi",		"d",		0x41010021, 0xffff07ff, WR_1|RD_a|TRAP,		0,		0,		MT32,	0 },
1414 {"mfthi",		"d,*",		0x41010021, 0xfff307ff, WR_1|RD_a|TRAP,		0,		0,		MT32,	0 },
1415 {"mftlo",		"d",		0x41000021, 0xffff07ff, WR_1|RD_a|TRAP,		0,		0,		MT32,	0 },
1416 {"mftlo",		"d,*",		0x41000021, 0xfff307ff, WR_1|RD_a|TRAP,		0,		0,		MT32,	0 },
2154 {"dextpdp",		"t,7,6",	0x7c0002bc, 0xfc00e7ff, WR_1|RD_a|DSP_VOLA,	0,		0,		D64,	0 },
2155 {"dextpdpv",		"t,7,s",	0x7c0002fc, 0xfc00e7ff, WR_1|RD_3|RD_a|DSP_VOLA, 0,		0,		D64,	0 },
2156 {"dextp",		"t,7,6",	0x7c0000bc, 0xfc00e7ff, WR_1|RD_a,		0,		0,		D64,	0 },
2157 {"dextpv",		"t,7,s",	0x7c0000fc, 0xfc00e7ff, WR_1|RD_3|RD_a,		0,		0,		D64,	0 },
2158 {"dextr.l",		"t,7,6",	0x7c00043c, 0xfc00e7ff, WR_1|RD_a,		0,		0,		D64,	0 },
2159 {"dextr_r.l",		"t,7,6",	0x7c00053c, 0xfc00e7ff, WR_1|RD_a,		0,		0,		D64,	0 },
2160 {"dextr_rs.l",		"t,7,6",	0x7c0005bc, 0xfc00e7ff, WR_1|RD_a,		0,		0,		D64,	0 },
2161 {"dextr_rs.w",		"t,7,6",	0x7c0001bc, 0xfc00e7ff, WR_1|RD_a,		0,		0,		D64,	0 },
2162 {"dextr_r.w",		"t,7,6",	0x7c00013c, 0xfc00e7ff, WR_1|RD_a,		0,		0,		D64,	0 },
2163 {"dextr_s.h",		"t,7,6",	0x7c0003bc, 0xfc00e7ff, WR_1|RD_a,		0,		0,		D64,	0 },
2164 {"dextrv.l",		"t,7,s",	0x7c00047c, 0xfc00e7ff, WR_1|RD_3|RD_a,		0,		0,		D64,	0 },
2165 {"dextrv_r.l",		"t,7,s",	0x7c00057c, 0xfc00e7ff, WR_1|RD_3|RD_a,		0,		0,		D64,	0 },
2166 {"dextrv_rs.l",		"t,7,s",	0x7c0005fc, 0xfc00e7ff, WR_1|RD_3|RD_a,		0,		0,		D64,	0 },
2167 {"dextrv_rs.w",		"t,7,s",	0x7c0001fc, 0xfc00e7ff, WR_1|RD_3|RD_a,		0,		0,		D64,	0 },
2168 {"dextrv_r.w",		"t,7,s",	0x7c00017c, 0xfc00e7ff, WR_1|RD_3|RD_a,		0,		0,		D64,	0 },
2169 {"dextrv_s.h",		"t,7,s",	0x7c0003fc, 0xfc00e7ff, WR_1|RD_3|RD_a,		0,		0,		D64,	0 },
2170 {"dextrv.w",		"t,7,s",	0x7c00007c, 0xfc00e7ff, WR_1|RD_3|RD_a,		0,		0,		D64,	0 },
2171 {"dextr.w",		"t,7,6",	0x7c00003c, 0xfc00e7ff, WR_1|RD_a,		0,		0,		D64,	0 },
2196 {"extpdp",		"t,7,6",	0x7c0002b8, 0xfc00e7ff, WR_1|RD_a|DSP_VOLA,	0,		0,		D32,	0 },
2197 {"extpdpv",		"t,7,s",	0x7c0002f8, 0xfc00e7ff, WR_1|RD_3|RD_a|DSP_VOLA, 0,		0,		D32,	0 },
2198 {"extp",		"t,7,6",	0x7c0000b8, 0xfc00e7ff, WR_1|RD_a,		0,		0,		D32,	0 },
2199 {"extpv",		"t,7,s",	0x7c0000f8, 0xfc00e7ff, WR_1|RD_3|RD_a,		0,		0,		D32,	0 },
2200 {"extr_rs.w",		"t,7,6",	0x7c0001b8, 0xfc00e7ff, WR_1|RD_a,		0,		0,		D32,	0 },
2201 {"extr_r.w",		"t,7,6",	0x7c000138, 0xfc00e7ff, WR_1|RD_a,		0,		0,		D32,	0 },
2202 {"extr_s.h",		"t,7,6",	0x7c0003b8, 0xfc00e7ff, WR_1|RD_a,		0,		0,		D32,	0 },
2203 {"extrv_rs.w",		"t,7,s",	0x7c0001f8, 0xfc00e7ff, WR_1|RD_3|RD_a,		0,		0,		D32,	0 },
2204 {"extrv_r.w",		"t,7,s",	0x7c000178, 0xfc00e7ff, WR_1|RD_3|RD_a,		0,		0,		D32,	0 },
2205 {"extrv_s.h",		"t,7,s",	0x7c0003f8, 0xfc00e7ff, WR_1|RD_3|RD_a,		0,		0,		D32,	0 },
2206 {"extrv.w",		"t,7,s",	0x7c000078, 0xfc00e7ff, WR_1|RD_3|RD_a,		0,		0,		D32,	0 },
2207 {"extr.w",		"t,7,6",	0x7c000038, 0xfc00e7ff, WR_1|RD_a,		0,		0,		D32,	0 },