Lines Matching defs:tmpl
8209 struct rsrc tmpl;
8217 tmpl.dependency = dep;
8218 tmpl.note = note;
8219 tmpl.insn_srlz = tmpl.data_srlz = 0;
8220 tmpl.qp_regno = CURR_SLOT.qp_regno;
8221 tmpl.link_to_qp_branch = 1;
8222 tmpl.mem_offset.hint = 0;
8223 tmpl.mem_offset.offset = 0;
8224 tmpl.mem_offset.base = 0;
8225 tmpl.specific = 1;
8226 tmpl.index = -1;
8227 tmpl.cmp_type = CMP_NONE;
8228 tmpl.depind = 0;
8229 tmpl.file = NULL;
8230 tmpl.line = 0;
8231 tmpl.path = 0;
8252 specs[count] = tmpl;
8261 specs[count] = tmpl;
8278 specs[count++] = tmpl;
8290 specs[count] = tmpl;
8321 specs[count] = tmpl;
8341 specs[count] = tmpl;
8350 specs[count] = tmpl;
8355 specs[count] = tmpl;
8378 specs[count] = tmpl;
8389 specs[count] = tmpl;
8406 specs[count] = tmpl;
8411 specs[count] = tmpl;
8431 specs[count] = tmpl;
8436 specs[count] = tmpl;
8443 specs[count] = tmpl;
8461 specs[count] = tmpl;
8466 specs[count] = tmpl;
8482 specs[count] = tmpl;
8502 specs[count] = tmpl;
8511 specs[count] = tmpl;
8518 specs[count] = tmpl;
8526 specs[count] = tmpl;
8544 specs[count] = tmpl;
8549 specs[count] = tmpl;
8569 specs[count] = tmpl;
8574 specs[count] = tmpl;
8594 specs[count] = tmpl;
8599 specs[count] = tmpl;
8606 specs[count] = tmpl;
8626 specs[count] = tmpl;
8638 specs[count] = tmpl;
8659 specs[count] = tmpl;
8676 specs[count] = tmpl;
8687 specs[count] = tmpl;
8703 specs[count] = tmpl;
8725 specs[count] = tmpl;
8737 specs[count] = tmpl;
8750 specs[count] = tmpl;
8762 specs[count] = tmpl;
8770 specs[count] = tmpl;
8797 specs[count] = tmpl;
8817 specs[count] = tmpl;
8831 specs[count] = tmpl;
8852 specs[count] = tmpl;
8867 specs[count] = tmpl;
8884 specs[count] = tmpl;
8893 specs[count] = tmpl;
8903 specs[count] = tmpl;
8910 specs[count] = tmpl;
8929 specs[count] = tmpl;
8944 specs[count] = tmpl;
8953 specs[count] = tmpl;
8974 specs[count] = tmpl;
8989 specs[count] = tmpl;
9006 specs[count] = tmpl;
9015 specs[count] = tmpl;
9025 specs[count] = tmpl;
9032 specs[count] = tmpl;
9053 specs[count++] = tmpl;
9063 specs[count++] = tmpl;
9073 specs[count++] = tmpl;
9082 specs[count++] = tmpl;
9087 specs[count++] = tmpl;
9116 specs[count++] = tmpl;
9125 specs[count++] = tmpl;
9146 specs[count++] = tmpl;
9151 specs[count++] = tmpl;
9171 specs[count++] = tmpl;
9189 specs[count++] = tmpl;
9207 specs[count++] = tmpl;
9223 specs[count++] = tmpl;
9240 specs[count++] = tmpl;
9245 specs[count++] = tmpl;
9257 specs[count++] = tmpl;
9272 specs[count++] = tmpl;
9280 specs[count++] = tmpl;
9296 specs[count++] = tmpl;
9303 specs[count++] = tmpl;
9322 specs[count++] = tmpl;
9333 specs[count++] = tmpl;
9340 specs[count++] = tmpl;
9356 specs[count++] = tmpl;
9363 specs[count++] = tmpl;
9374 specs[count++] = tmpl;
9393 specs[count] = tmpl;
9405 specs[count] = tmpl;
9415 specs[count] = tmpl;
9422 specs[count] = tmpl;
9433 specs[count++] = tmpl;
9441 specs[count++] = tmpl;
9450 specs[count++] = tmpl;
9457 specs[count++] = tmpl;
9473 specs[count] = tmpl;
9481 specs[count] = tmpl;
9490 specs[count++] = tmpl;
9511 specs[count++] = tmpl;
9521 specs[count++] = tmpl;
9530 specs[count++] = tmpl;
9537 specs[count++] = tmpl;
9543 specs[count++] = tmpl;