ARM/AsmParser/ARMAsmParser.cpp

853     unsigned ShiftImm;        // shift for OffsetReg.
863     unsigned ShiftImm;
875     unsigned ShiftImm;
881     unsigned ShiftImm;
1691         Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm != 1 ||
1710     if (Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm > 3)
1889         (Memory.ShiftType != ARM_AM::uxtw || Memory.ShiftImm != shift))
2551       ARM_AM::getSORegOpc(RegShiftedReg.ShiftTy, RegShiftedReg.ShiftImm)));
2560     unsigned Imm = (RegShiftedImm.ShiftImm == 32 ? 0 : RegShiftedImm.ShiftImm);
2967                             Memory.ShiftImm, Memory.ShiftType);
3209                         Memory.ShiftImm, Memory.ShiftType);
3219     Inst.addOperand(MCOperand::createImm(Memory.ShiftImm));
3304     unsigned Imm = ARM_AM::getAM2Opc(opc, PostIdxReg.ShiftImm,
3640                         unsigned ShiftReg, unsigned ShiftImm, SMLoc S,
3646     Op->RegShiftedReg.ShiftImm = ShiftImm;
3654                          unsigned ShiftImm, SMLoc S, SMLoc E) {
3658     Op->RegShiftedImm.ShiftImm = ShiftImm;
3804             ARM_AM::ShiftOpc ShiftType, unsigned ShiftImm, unsigned Alignment,
3811     Op->Memory.ShiftImm = ShiftImm;
3822                    unsigned ShiftImm, SMLoc S, SMLoc E) {
3827     Op->PostIdxReg.ShiftImm = ShiftImm;
3955       OS << " shift-imm:" << Memory.ShiftImm;
3966          << PostIdxReg.ShiftImm;
3993        << RegShiftedImm.ShiftImm << ">";
5646   unsigned ShiftImm = 0;
5649     if (parseMemRegOffsetShift(ShiftTy, ShiftImm))
5657                                                   ShiftImm, S, E));
5986   unsigned ShiftImm = 0;
5989     if (parseMemRegOffsetShift(ShiftType, ShiftImm))
6000                                            ShiftType, ShiftImm, 0, isNegative,