ARM/AsmParser/ARMAsmParser.cpp

5813   // mnemonic, condition code, Rt, Rt2, Qd, idx, Qd again, idx2
5817   ((ARMOperand &)*Operands[3]).addRegOperands(Inst, 1); // Rt2
6932 // We have to be careful to not emit an invalid Rt2 here, because the rest of
7416         unsigned Rt2 = MRI->getEncodingValue(Reg2);
7418         // Rt2 must be Rt + 1 and Rt must be even.
7419         if (Rt + 1 != Rt2 || (Rt & 1)) {
7537   unsigned Rt2 = MRI->getEncodingValue(Inst.getOperand(RtIndex + 1).getReg());
7550     // Rt2 must be Rt + 1.
7551     if (Rt2 != Rt + 1) {
7565     if (Rt2 == Rt)
7573     if (Rn == Rt || Rn == Rt2) {