Lines Matching defs:SHL

192     setOperationAction(ISD::SHL, VT, Custom);
265 setOperationAction(ISD::SHL, VT, Custom);
959 setTargetDAGCombine(ISD::SHL);
1140 setOperationAction(ISD::SHL, MVT::i64, Custom);
1526 setTargetDAGCombine(ISD::SHL);
1917 if (Op.getOpcode() != ISD::SHL)
3413 SDValue Slot = DAG.getNode(ISD::SHL, DL, PtrVT, TLSIndex,
3893 SDValue SHL =
3894 DAG.getNode(ISD::SHL, dl, VTy, XOR, DAG.getConstant(1, dl, VTy));
3896 DAG.getNode(ISD::OR, dl, VTy, SHL, DAG.getConstant(1, dl, VTy));
3915 SDValue SHLHi = DAG.getNode(ISD::SHL, dl, VTy, XORHi, Constant1);
4574 LHS = DAG.getNode(ISD::SHL, dl, MVT::i32, LHS.getOperand(0), ShiftAmt);
4586 if (Subtarget->isThumb1Only() && LHS->getOpcode() == ISD::SHL &&
6034 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt);
6074 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt);
6079 SDValue HiBigShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ExtraShAmt);
6087 SDValue LoSmallShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt);
6139 RMValue = DAG.getNode(ISD::SHL, DL, MVT::i32, RMValue,
6317 if (N->getOpcode() == ISD::SHL) {
6350 // We can get here for a node like i32 = ISD::SHL i32, i64
6355 N->getOpcode() == ISD::SHL) &&
6402 if (!isOneConstant(N->getOperand(1)) || N->getOpcode() == ISD::SHL)
9876 case ISD::SHL:
10002 case ISD::SHL:
12826 if (N->getOpcode() != ISD::SHL)
12833 if (N->getOpcode() != ISD::SHL)
12922 if (U->getOperand(0).getOpcode() == ISD::SHL ||
12923 U->getOperand(1).getOpcode() == ISD::SHL)
12933 if (N->getOperand(0).getOpcode() != ISD::SHL)
12936 SDValue SHL = N->getOperand(0);
12939 auto *C2 = dyn_cast<ConstantSDNode>(SHL.getOperand(1));
12966 SDValue X = SHL.getOperand(0);
12970 SDValue Res = DAG.getNode(ISD::SHL, dl, MVT::i32, BinOp, SHL.getOperand(1));
12972 LLVM_DEBUG(dbgs() << "Simplify shl use:\n"; SHL.getOperand(0).dump();
12973 SHL.dump(); N->dump());
13213 DAG.getNode(ISD::SHL, DL, VT,
13220 DAG.getNode(ISD::SHL, DL, VT,
13233 DAG.getNode(ISD::SHL, DL, VT,
13241 DAG.getNode(ISD::SHL, DL, VT,
13252 Res = DAG.getNode(ISD::SHL, DL, VT,
13283 if (N0->getOpcode() != ISD::SHL && N0->getOpcode() != ISD::SRL)
13286 bool LeftShift = N0->getOpcode() == ISD::SHL;
13314 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0),
13316 return DAG.getNode(ISD::SRL, DL, MVT::i32, SHL,
13325 SDValue SHL = DAG.getNode(ISD::SRL, DL, MVT::i32, N0->getOperand(0),
13327 return DAG.getNode(ISD::SHL, DL, MVT::i32, SHL,
13338 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0),
13340 return DAG.getNode(ISD::SRL, DL, MVT::i32, SHL,
13351 SDValue SHL = DAG.getNode(ISD::SRL, DL, MVT::i32, N0->getOperand(0),
13353 return DAG.getNode(ISD::SHL, DL, MVT::i32, SHL,
13423 SDValue SHL = OR->getOperand(1);
13425 if (SRL.getOpcode() != ISD::SRL || SHL.getOpcode() != ISD::SHL) {
13427 SHL = OR->getOperand(0);
13429 if (!isSRL16(SRL) || !isSHL16(SHL))
13434 if ((SRL.getOperand(0).getNode() != SHL.getOperand(0).getNode()) ||
13440 SHL.getOperand(0) != SDValue(SMULLOHI, 1))
13578 N00.getOpcode() == ISD::SHL && isa<ConstantSDNode>(N00.getOperand(1)) &&
16116 if (ST->isThumb1Only() && N->getOpcode() == ISD::SHL && VT == MVT::i32 &&
16141 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0),
16144 ISD::SRL, DL, MVT::i32, SHL,
16162 case ISD::SHL:
16868 // Result = if K != 0 then (SHL t2:0, K) else t2:0
16875 // Result = if K != 0 then (SHL t2:0, K) else t2:0
16890 Res = DAG.getNode(ISD::SHL, dl, VT, Res,
16989 case ISD::SHL:
17465 U->getOpcode() == ISD::SHL || U->getOpcode() == ARMISD::VSHLIMM))
18302 ISD::SHL, SDLoc(Op), MVT::i32, Op.getOperand(1),