Lines Matching refs:CPSR
234 bool DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR);
245 // default CCReg argument. Sets CPSR if we're setting CPSR instead of CCR.
246 bool ARMFastISel::DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR) {
250 // Look to see if our OptionalDef is defining CPSR or CCR.
253 if (MO.getReg() == ARM::CPSR)
254 *CPSR = true;
277 // CPSR defs that need to be added before the remaining operands. See s_cc_out
290 // defines CPSR. All other OptionalDefines in ARM are the CCR register.
291 bool CPSR = false;
292 if (DefinesOptionalPredicate(MI, &CPSR))
293 MIB.add(CPSR ? t1CondCodeOp() : condCodeOp());
1251 .addMBB(TBB).addImm(ARMPred).addReg(ARM::CPSR);
1274 .addMBB(TBB).addImm(CCMode).addReg(ARM::CPSR);
1312 .addMBB(TBB).addImm(CCMode).addReg(ARM::CPSR);
1474 // ARMEmitCmp emits a FMSTAT when necessary, so it's always safe to use CPSR.
1477 .addImm(ARMPred).addReg(ARM::CPSR);
1661 .addReg(ARM::CPSR);
1669 .addReg(ARM::CPSR);
2695 // 16-bit Thumb instructions always set CPSR (unless they're in an IT block).
2707 // CPSR is set only by 16-bit Thumb instructions.
2723 MIB.addReg(ARM::CPSR, RegState::Define);