Lines Matching refs:SVE

6210     #NameBase, SVE::BI__builtin_sve_##NameBase, Intrinsic::LLVMIntrinsic, 0,   \
6215 { #NameBase, SVE::BI__builtin_sve_##NameBase, 0, 0, TypeModifier }
8872 if (BuiltinID >= SVE::BI__builtin_sve_reinterpret_s8_s8 &&
8873 BuiltinID <= SVE::BI__builtin_sve_reinterpret_f64_f64) {
8889 // Immediates for SVE llvm intrinsics are always 32bit. We can safely
8975 case SVE::BI__builtin_sve_svmov_b_z: {
8983 case SVE::BI__builtin_sve_svnot_b_z: {
8991 case SVE::BI__builtin_sve_svmovlb_u16:
8992 case SVE::BI__builtin_sve_svmovlb_u32:
8993 case SVE::BI__builtin_sve_svmovlb_u64:
8996 case SVE::BI__builtin_sve_svmovlb_s16:
8997 case SVE::BI__builtin_sve_svmovlb_s32:
8998 case SVE::BI__builtin_sve_svmovlb_s64:
9001 case SVE::BI__builtin_sve_svmovlt_u16:
9002 case SVE::BI__builtin_sve_svmovlt_u32:
9003 case SVE::BI__builtin_sve_svmovlt_u64:
9006 case SVE::BI__builtin_sve_svmovlt_s16:
9007 case SVE::BI__builtin_sve_svmovlt_s32:
9008 case SVE::BI__builtin_sve_svmovlt_s64:
9011 case SVE::BI__builtin_sve_svpmullt_u16:
9012 case SVE::BI__builtin_sve_svpmullt_u64:
9013 case SVE::BI__builtin_sve_svpmullt_n_u16:
9014 case SVE::BI__builtin_sve_svpmullt_n_u64:
9017 case SVE::BI__builtin_sve_svpmullb_u16:
9018 case SVE::BI__builtin_sve_svpmullb_u64:
9019 case SVE::BI__builtin_sve_svpmullb_n_u16:
9020 case SVE::BI__builtin_sve_svpmullb_n_u64:
9023 case SVE::BI__builtin_sve_svdup_n_b8:
9024 case SVE::BI__builtin_sve_svdup_n_b16:
9025 case SVE::BI__builtin_sve_svdup_n_b32:
9026 case SVE::BI__builtin_sve_svdup_n_b64: {
9034 case SVE::BI__builtin_sve_svdupq_n_b8:
9035 case SVE::BI__builtin_sve_svdupq_n_b16:
9036 case SVE::BI__builtin_sve_svdupq_n_b32:
9037 case SVE::BI__builtin_sve_svdupq_n_b64:
9038 case SVE::BI__builtin_sve_svdupq_n_u8:
9039 case SVE::BI__builtin_sve_svdupq_n_s8:
9040 case SVE::BI__builtin_sve_svdupq_n_u64:
9041 case SVE::BI__builtin_sve_svdupq_n_f64:
9042 case SVE::BI__builtin_sve_svdupq_n_s64:
9043 case SVE::BI__builtin_sve_svdupq_n_u16:
9044 case SVE::BI__builtin_sve_svdupq_n_f16:
9045 case SVE::BI__builtin_sve_svdupq_n_bf16:
9046 case SVE::BI__builtin_sve_svdupq_n_s16:
9047 case SVE::BI__builtin_sve_svdupq_n_u32:
9048 case SVE::BI__builtin_sve_svdupq_n_f32:
9049 case SVE::BI__builtin_sve_svdupq_n_s32: {
9094 case SVE::BI__builtin_sve_svpfalse_b:
9097 case SVE::BI__builtin_sve_svlen_bf16:
9098 case SVE::BI__builtin_sve_svlen_f16:
9099 case SVE::BI__builtin_sve_svlen_f32:
9100 case SVE::BI__builtin_sve_svlen_f64:
9101 case SVE::BI__builtin_sve_svlen_s8:
9102 case SVE::BI__builtin_sve_svlen_s16:
9103 case SVE::BI__builtin_sve_svlen_s32:
9104 case SVE::BI__builtin_sve_svlen_s64:
9105 case SVE::BI__builtin_sve_svlen_u8:
9106 case SVE::BI__builtin_sve_svlen_u16:
9107 case SVE::BI__builtin_sve_svlen_u32:
9108 case SVE::BI__builtin_sve_svlen_u64: {
9118 case SVE::BI__builtin_sve_svtbl2_u8:
9119 case SVE::BI__builtin_sve_svtbl2_s8:
9120 case SVE::BI__builtin_sve_svtbl2_u16:
9121 case SVE::BI__builtin_sve_svtbl2_s16:
9122 case SVE::BI__builtin_sve_svtbl2_u32:
9123 case SVE::BI__builtin_sve_svtbl2_s32:
9124 case SVE::BI__builtin_sve_svtbl2_u64:
9125 case SVE::BI__builtin_sve_svtbl2_s64:
9126 case SVE::BI__builtin_sve_svtbl2_f16:
9127 case SVE::BI__builtin_sve_svtbl2_bf16:
9128 case SVE::BI__builtin_sve_svtbl2_f32:
9129 case SVE::BI__builtin_sve_svtbl2_f64: {