Lines Matching refs:POW_SM
848 #define POW_SM(_r, _s) (((_r) & 0x3f) << (_s))
927 POW_SM(ratesArray[rate18mb], 24)
928 | POW_SM(ratesArray[rate12mb], 16)
929 | POW_SM(ratesArray[rate9mb], 8)
930 | POW_SM(ratesArray[rate6mb], 0)
933 POW_SM(ratesArray[rate54mb], 24)
934 | POW_SM(ratesArray[rate48mb], 16)
935 | POW_SM(ratesArray[rate36mb], 8)
936 | POW_SM(ratesArray[rate24mb], 0)
942 POW_SM(ratesArray[rate2s], 24)
943 | POW_SM(ratesArray[rate2l], 16)
944 | POW_SM(ratesArray[rateXr], 8) /* XR target power */
945 | POW_SM(ratesArray[rate1l], 0)
948 POW_SM(ratesArray[rate11s], 24)
949 | POW_SM(ratesArray[rate11l], 16)
950 | POW_SM(ratesArray[rate5_5s], 8)
951 | POW_SM(ratesArray[rate5_5l], 0)
961 POW_SM(ratesArray[rateHt20_3], 24)
962 | POW_SM(ratesArray[rateHt20_2], 16)
963 | POW_SM(ratesArray[rateHt20_1], 8)
964 | POW_SM(ratesArray[rateHt20_0], 0)
967 POW_SM(ratesArray[rateHt20_7], 24)
968 | POW_SM(ratesArray[rateHt20_6], 16)
969 | POW_SM(ratesArray[rateHt20_5], 8)
970 | POW_SM(ratesArray[rateHt20_4], 0)
977 POW_SM(ratesArray[rateHt40_3] + ht40PowerIncForPdadc, 24)
978 | POW_SM(ratesArray[rateHt40_2] + ht40PowerIncForPdadc, 16)
979 | POW_SM(ratesArray[rateHt40_1] + ht40PowerIncForPdadc, 8)
980 | POW_SM(ratesArray[rateHt40_0] + ht40PowerIncForPdadc, 0)
983 POW_SM(ratesArray[rateHt40_7] + ht40PowerIncForPdadc, 24)
984 | POW_SM(ratesArray[rateHt40_6] + ht40PowerIncForPdadc, 16)
985 | POW_SM(ratesArray[rateHt40_5] + ht40PowerIncForPdadc, 8)
986 | POW_SM(ratesArray[rateHt40_4] + ht40PowerIncForPdadc, 0)
990 POW_SM(ratesArray[rateExtOfdm], 24)
991 | POW_SM(ratesArray[rateExtCck], 16)
992 | POW_SM(ratesArray[rateDupOfdm], 8)
993 | POW_SM(ratesArray[rateDupCck], 0)
999 POW_SM(pModal->pwrDecreaseFor3Chain, 6)
1000 | POW_SM(pModal->pwrDecreaseFor2Chain, 0)
1003 #undef POW_SM